View TA1316AN_311961.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TA1316AN
Toshiba Bipolar Linear Integrated Circuit Silicon Monolithic
TA1316AN
YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV
TA1316AN is a component signal and sync processor for Digital TV, Progressive scan TV and Double scan TV. TA1316AN provides high performance signal processors in the luminance and color difference blocks. The sync circuit can process 525I/P, 625I/P, 750P, 1125I/P, PAL100 Hz and NTSC120 Hz formats. TA1316AN provides I2C bus interface, so various functions and controls are adjustable via the bus.
Features
Luminance Block
* * * * * * * * * * * * * * Black stretch, DC restoration Dynamic correction SRT (LTI) Y group delay correction (shoot balance correction) APACON white peak limit White pulse limit (white letter improvement) Hi-bright color Color detail enhancer (CDE) VSM output Flesh color correction Dynamic Y/C correction Color SRT (CTI) Color White peak blue correction
Weight: 5.55 g (typ.)
Text Block
* * * * * OSD blending SW ACB (only black level) 2 analog RGB inputs Horizontal synchronization/deflection (15.75 kHz, 31.5 kHz, 33.75 kHz, 45 kHz) Vertical synchronization/deflection (525I/P, 625I/P, 750P, 1125I/P, PAL 100 Hz, NTSC 120 Hz) 2- and 3-level sync. separation circuit Accept both positive and negative HD/VD input Mask for copy-guard signal Vertical blanking
Deflection Block
Color Difference Block
* * * *
000707EBA1
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
2000-07-20
1/113
TA1316AN
Block Diagram
DEF/DAC GND DEF/DAC VCC
Cb1/Pb1 IN
Cr1/Pr1 IN
Cb2/Pb2 IN 9
I L GND
19 Y/C VCC 55 Y/C GND 6 RGB VCC 40 RGB GND 44 SCL 30
25
29
32
3
4 CLAMP
5
8
10
CP SW
CLAMP
YHDPbPr/YCbCr YUV CONVERT U V Y BLACK STRETCH UV IQ CONVERTER I CBUS DECODER SW DAC2
2
Cr2/Pr2 IN
I L VDD
Y1 IN
Y2 IN
2
2
7 MATRIX SW BLACK PEAK DETECT
2 BPH FILTER
SDA 31 DAC2 36 (ACB PLUSE) DAC1 28 (SYNC OUT) SCP OUT 18 SCP IN 17 H-OUT 26 HORIZONTAL FREQUENCY 22 SW HVCO 21
FRESH COLOR IQ UV CONVERTER SW SYNC OUT Y/C LEVEL COMP EXT BPP BPP SW TINT DL/ COLOR SRT
BLACK LEVEL CORECTION DYNAMIC
DARK DET
1 DARK AREA DET FILTER
SW DAC1
DC REST SHARPNESS DELAY LINE SRT GROUP DELAY + CORRECTION APACON WPL + SHARPNESS CONTROL Y DETAIL CONTROL CDE APL DETECT 56 APL FILTER
+ CP/BPP H DUTY H FREQUENCY SW HORIZONTAL PHASE EXT CP H C/D HVCO CLAMP PULSE CP SW
YNR
CP +
COLOR
SUBCONTRAST UNICOLOR CP CLAMP WPL
AFC FILTER 20 H CURVE CORRECTION H CURVE 23 CORRECTION FBP IN 24
H-AFC
UNI-COLOR RELATIVE PHASE/ AMPLITUDE G-Y MATRIX B-Y R-Y G-Y COLOR
H-BPP FBP/BLK H-RAMP 2 x fH V C/D CLAMP PULSE EXT V-BLK HD POLARITY H-BLK +
V-BPP
BRIGHTNESS ABCL AMP
53 ABCL IN
VP OUT 27
VP OUT
V FREQUENCY SW ACB PULSE
WPS HI-BRIGHT COLOR Yout-
SYNC IN 14
SYNC SEPA HD IN SW
HD1 IN 16
11 COLOR LIMITER HPF
V-BLK
HALF TONE /C MUTE
HALF TONE COLOR PEAK DETECT
HD2 IN 13 V INTEGRAL VD1 IN 15 CP VD2 IN 12 R OUT 43 G OUT 42 B OUT 41 SW S/H CUT OFF RGB BRIGHTNESS IK CLAMP YM SW RGB OUT BLK VD IN SW CP CLAMP DRIVE MIXER SW/ BLUE BACK CP OSD ACL SW CLAMP V-CLP WP BLUE VSM AMP VSM MUTE 54 VSM OUT 39 ANALOG OSD R IN 38 ANALOG OSD G IN 37 ANALOG OSD B IN 51 YS1 (ANALOG OSD) 50 YS2 (ANALOG OSD)
CLAMP OSD AMP
RGB MATRIX
Y
CP OR
RGB CONTRAST 48 R S/H 47 G S/H 46 B S/H 35 ANALOG R IN 34 ANALOG G IN 33 ANALOG B IN 49 YS3 (ANALOG RGB) 52 YM/PMUTE/BLK
45 IK IN
2000-07-20
2/113
TA1316AN
Pin Assignment
DARK AREA DET FILTER BPH FILTER Y1 IN Cb1/Pb1 IN Cr1/Pr1 IN Y/C GND MATRIX SW Y2 IN Cb2/Pb2 IN
1 2 3 4 5 6 7 8 9
56 55 54 53 52 51 50 49 48 47 46 45 44 TA1316AN 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
APL FILTER Y/C VCC VSM OUT ABCL IN YM/P-MUTE/BLK YS 1 (analog OSD) YS 2 (analog OSD) YS 3 (analog RGB) R S/H G S/H B S/H IK IN RGB GND R OUT G OUT B OUT RGB VCC ANALOG OSD R IN ANALOG OSD G IN ANALOG OSD B IN DAC2 (ACB pulse) ANALOG R IN ANALOG G IN ANALOG B IN I L GND SDA SCL I L VDD
2 2
Cr2/Pr2 IN 10 COLOR LIMITER 11 VD2 IN 12 HD2 IN 13 SYNC IN 14 VD1 IN 15 HD1 IN 16 SCP IN 17 SCP OUT 18 DEF/DAC VCC 19 AFC FILTER 20 HVCO 21 HORIZONTAL FREQUENCY SW 22 H CURVE CORRECTION 23 FBP IN 24 DEF/DAC GND 25 H-OUT 26 VP OUT 27 DAC1 (SYNC OUT) 28
2000-07-20
3/113
TA1316AN
Pin Functions
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
55
1
DARK AREA DET FILTER
Connect filter for detecting black area. Voltage value of this pin controls dynamic circuit gain. DC 1 50 k 5 k
6
55 1 k Connect filter for detecting black peak. 2 BPH FILTER Voltage value of this pin controls black stretch gain. 2 4 k 200 1 k 1 k
DC
4.25 V
1 k
5V
6
2000-07-20
4/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal 1 Vp-p (including sync) at 100% color bar 55
Inputs Y1 signal via clamp capacitor. 3 Y1 IN Recommended input amplitude: 1 Vp-p (including sync) at 100% color bar.
3
1 k 1 k or
5 k
6
55
Inputs Cb1/Pb1 signal via clamp capacitor. 4 Cb1/Pb1 IN Recommended input amplitude: 700 mVp-p at 100% color bar.
4
1 k 1 k 700 mVp-p at 100% color bar for Cb1/Pb1
5 k
6
2000-07-20
5/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
55
Inputs Cr1/Pr1 signal via clamp capacitor. 5 Cr1/Pr1 IN Recommended input amplitude: 700 mVp-p at 100% color bar.
5
1 k 1 k 100 mVp-p at 100% color bar for Cr1/Pr1
5 k
6
6
Y/C GND
GND pin for Y/C block.
55 Matrix switching pin for YCbCr or YPbPr input. Switches matrix according to voltage value input to this pin. 7 MATRIX SW Control by pin has priority over control by BUS. When pin is not used, connect 0.01 F capacitor between pin and GND. 7 1 k 112 k BUS 25 A 0~1.3 V: YCbCr YUV 1.7~5 V: YPbPr YUV Open: BUS control
6
2000-07-20
6/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal 1 Vp-p (including sync) at 100% color bar 55
Inputs Y2 signal via clamp capacitor. 8 Y2 IN Recommended input amplitude: 1 Vp-p (including sync) at 100% color bar.
8
1 k 1 k or
5 k
6
55
Inputs Cb2/Pb2 signal via clamp capacitor. 9 Cb2/Pb2 IN Recommended input amplitude: 700 mVp-p at 100% color bar.
9
1 k 1 k 700 mVp-p at 100% color bar for Cb2/Pb2
5 k
6
2000-07-20
7/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
55
Inputs Cr2/Pr2 signal via clamp capacitor. 10 Cr2/Pr2 IN Recommended input amplitude: 700 mVp-p at 100% color bar.
10
1 k 1 k 700 mVp-p at 100% color bar for Cr2/Pr2
5 k
6
55 7 A 11 COLOR LIMITER Connect filter for detecting color limit.
11
5 k
DC
6
2000-07-20
8/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
19
Threshold: 0.75 V
12
VD2 IN
Inputs vertical sync signal VD2. Signal input can have both positive and negative polarity.
12
1 k 45 k
or
25
Threshold: 0.75 V
19
Threshold: 0.75 V
13
HD2 IN
Inputs horizontal sync signal HD2. Signal input can have both positive and negative polarity.
13
1 k 50 k
or
Threshold: 0.75 V 25
2000-07-20
9/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal White 100%: 1 Vp-p 19 1 k 14 SYNC IN Inputs sync signal via clamp capacitor. 14 1 k
1 k
or
10 A
25
19
Threshold: 0.75 V
15
VD1 IN
Inputs vertical sync signal VD1. Signal input can have both positive and negative polarity.
15
1 k 45 k
or
25
Threshold: 0.75 V
2000-07-20
10/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
19
Threshold: 0.75 V
16
HD1 IN
Inputs horizontal sync signal HD1. Input signal can have both positive and negative polarity.
16
1 k 50 k
or
25
Threshold: 0.75 V
19 40 k
Inputs SCP from up converter. 17 SCP IN Input signals are clamp pulse (CP) and black peak detection stop pulse (BPP). 17 5 k
1.7 V~3.3 V: BPP 3.7 V~9 V: 50 k CP
25
500
19 CP: 5.0 V BPP: 2.5 V
Outputs SCP. 18 SCP OUT Output signals are clamp pulse (CP) and black peak detection stop pulse (BPP).
2.5 k
18
0V 200
25
2000-07-20
11/113
TA1316AN
Pin No. Pin Name Function VCC pin for DEF/DAC block. 19 DEF/DAC VCC To ascertain the correct voltage for VCC, please refer to the table entitled Maximum Ratings. Interface Circuit Input Signal/Output Signal
19
20
AFC FILTER
Connect filter for detecting AFC. 20
DC 300 30 k
25
19
21
HVCO
Connect ceramic oscillator for horizontal oscillation. Use Murata CSB503F30 oscillator.
2 k
1 k
21
1 k
10 k 25
2000-07-20
12/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
19 1 k
60 k 60 k 15 k
22
HORIZONTAL FREQUENCY SW
Horizontal frequency select pin. Selects horizontal frequency according to voltage value input to this pin. When selecting horizontal frequency by BUS control, leave pin open. Control by pin has priority over control by BUS.
22
1 k 30 k
7.5 V
At BUS control (horizontal frequency): output voltage value 00 (15.75 kHz): DC 9 V 01 (31.5 kHz): DC 6 V 10 (33.75 kHz): DC 3 V 11 (45 kHz): DC 0 V At pin 22 control, horizontal frequency and input voltage value 0~1.0 V: 2.0~4.0 V: 5.0~7.0 V: 8.0~9.0 V: 45 kHz 33.75 kHz 31.5 kHz 15.75 kHz
60 k
4.5 V
20 pF
1.5 V 16 k
25
19 65 k
23
H CURVE CORRECTION
Corrects curve at high-tension fluctuation. Input AC component of high-tension fluctuation. When pin is not used, connect 0.01 F capacitor between pin and GND.
23
1 k
50 k
DC 25 k 6.5 V 130 k 25
2000-07-20
13/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
19
2.25 V
max: 9 V
24
FBP IN
Input FBP and H-BLK for horizontal AFC.
H-AFC threshold: 3.0 V 24 BLK threshold: 1.5 V 500 1 k
5V
25
25
DEF/DAC GND
GND pin for DEF/DAC block.
19
26
H-OUT
Horizontal output pin. Open collector output.
26
5 k
25
2000-07-20
14/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
19 200 A
Outputs vertical pulse. 27 VP OUT When a current of 500 A or more is applied to the pin, external blanking is carried out by ORing this signal with the internal blanking signal. 27
5V
200
0V 32 25
19 Outputs 1-bit DAC or composite SYNC signal after sync separation. 28 DAC1 (SYNC OUT) Open-collector output (The output level for this pin cannot be guaranteed since leakage from internal signals may occur.) DC or SYNC OUT 28 500
32 25
29
I L VDD
2
VDD pin for I L block. Connect 2 V (typ.).
2
2000-07-20
15/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
19
2.25 V
30
SCL
SCL pin for I C BUS.
2
30
5 k
SCL
25 32
19
ACK
2.25 V
31
SDA
SDA pin for I C BUS.
2
31
50
5 k
SDA
25 32
2 2
32
I L GND
GND pin for I L block.
2000-07-20
16/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
40
33
ANALOG B IN Inputs analog R/G/B signal via clamp capacitor. 33 34 35 1 k 1 k 100 IRE: 0.7 Vp-p
34
ANALOG G IN
Recommended input amplitude: 0.7 Vp-p (no sync) at 100% white
35
ANALOG R IN
1 k
44
40 DC or ACB pulse
36
DAC2 (ACB pulse)
Outputs 1-bit DAC or ACB pulse Open-collector output
36
500
44
2000-07-20
17/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
40
37
ANALOG OSD B IN Inputs analog OSD signal via clamp capacitor. 37 38 39 1 k 1 k 100 IRE: 0.7 Vp-p
38
ANALOG OSD G IN
Recommended input amplitude: 0.7 Vp-p (no sync) at 100% white
39
ANALOG OSD R IN
1 k
44
VCC pin for text/RGB block. 40 RGB VCC To ascertain the correct voltage for VCC, please refer to the table entitled Maximum Ratings.
40 100
41
B OUT Outputs R/G/B signal. 41 42 43 200
100 IRE: 2.3 Vp-p Conditions: UNI-COLOR = max SUB-CONT = Cent 2.7 mA Y IN = 0.7 Vp-p
42
G OUT
Recommended output amplitude: 100 IRE = 2.3 Vp-p
43
R OUT
44
44
RGB GND
GND pin for text/RGB block.
2000-07-20
18/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
40 0 V~3 V Inputs the feedback signal from CRT. (BLK level should be 0 V to 3 V.) When ACB is not used, connect this pin to the RGB VCC pin. 45
R
G
B 1 Vp-p (typ.)
or RGB VCC 1 k
45
IK IN
44
40
46
B S/H Sample-and-hold (S/H) pin. 46 47 48
500 1 k 5 k DC 3 pF 44
47
G S/H
In ACB mode connect a 2.2-F capacitor. In CUTOFF mode connect a 0.01-F capacitor.
48
R S/H
3V
2000-07-20
19/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
40 Selects input between internal RGB and external analog RGB according to voltage value input to this pin. When analog RGB is selected, mutes VSM output.
49
YS3 (analog RGB)
300 49 300 44
0~0.5 V: Internal 0.9~5 V: Analog RGB, VSM mute
Switches between internal RGB and OSD input signals. Voltage applied to YS1 and YS2 adjusts blend ratio of internal RGB and OSD signals. 50 YS2 (analog OSD) When YS1 or YS2 is High, mutes VSM output. Blend ratio YS2 YS1 Int RGB: OSD RGB 51 YS1 (analog OSD) L H L H L L H H 10:0 7:3 5:5 0:10 50 51 300 50 k 40
0~0.5 V:
Internal
0.9~2.1 V: VSM mute 2.4~5 V: OSD, VSM mute
44
2000-07-20
20/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
40
52
YM/P-MUTE/BLK
Also performs image mute or blanking.
80 k
Fast half-tone switch for internal RGB signal.
52
300
0~0.5 V:
Internal
0.9~2.1 V: Half-tone 2.4~5.8 V: P-mute 6.2~9 V: Blanking
10 k
44
40
6.75 V
ABL and ACL input pin. 53 ABCL IN Can set gain and start point for ABL and dynamic ABL by BUS control. 53
30 k
3 k DC
44
2000-07-20
21/113
TA1316AN
Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal
40 Outputs Y signal for VSM which passes through HPF circuit (primary differential circuit). Mutes output signal using pins 49, 50 and 51. 200
54
VSM OUT
54
1.6 mA
1 k
200
6
VCC pin for Y/C block. 55 Y/C VCC To ascertain the correct voltage for VCC, please refer to the table entitled Maximum Ratings.
55
40 k Connect filter for correcting DC restoration. 56 APL FILTER Leaving this pin open enables user to monitor Y signal after black stretch and dynamic . 56
1 k
1 k
6
2000-07-20
22/113
TA1316AN
Bus Control Map
Write Mode
Slave Address: 88H
Sub-Add 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F R-Y/B-Y GAIN G-Y/B-Y GAIN COLOR SRT GAIN C.D.E. VSM PHASE C-SRT FREQ Y/C GAIN COMP1 HI BRT SUB CONTRAST DRIVE GAIN1 DRIVE GAIN2 R CUT OFF G CUT OFF B CUT OFF R-Y/B-Y PHASE G-Y/B-Y PHASE COLOR CLT OSD-ACL TINT PICTURE SHARPNESS RGB BRIGHTNESS RGB CONTRAST WPS YUV INPUT MODE DR-R DR-B/G ACB-MODE D7 H-FREQ D6 D5 H-DUTY D4 YUV-SW D3 DAC1 D2 DAC2 D1 D0 Preset 1000 1000 1000 1000 1000 1000 1000 1000 RGB-ACL YNR DCRR-SW 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
SYNC INPUT-SW CLP-PHS TEST
HORIZONTAL POSITION SCP-SW V-BLK PHASE COMPRESSION-BLK PHASE-1 P-MODE1 HBP-PHS SYNC SEP-LEVEL
VERTICAL FREQUENCY COMPRESSION-BLK PHASE-2 UNI-COLOR BRIGHTNESS COLOR
Y/C GAIN COMP2 VSM GAIN DC REST RATE
FRESH-COLOR APACON PEAK FREQ DC REST LIMIT
DC REST POINT BLACK STRETCH POINT SHR-TRACKING DYNAMIC ABL POINT ABL POINT DYNC -POINT OSD BRIGHT
APL VS BSP WPL-LEVEL
B.L.C.
B.D.L WPL-FREQ
BS-ARE
DYNAMIC ABL GAIN ABL GAIN
P-MODE2 RGB OUT MODE STATIC -GAIN APACON WPL WP BLUE POINT Y-OUT
DYNC GAIN VS DARK AREA OSD CONTRAST Y/C-DL1
Y DETAIL CONTROL Y GROUP DELAY CORRECTION Y/C-DL2
WP BLUE GAIN
Read Mode
Slave Address: 89H
D7 0 POR D6 IK-IN D5 RGB-OUT D4 YUV-IN D3 H-OUT D2 VP-OUT D1 RGB-IN D0 SYNC-IN
2000-07-20
23/113
TA1316AN
Bus Control Functions
Write Mode
Parameter Explanation Selects horizontal oscillation frequency. H-FREQUENCY 00: 15.75 kHz, 01: 31.5 kHz, 10: 33.75 kHz, 11: 45 kHz 33.75 kHz Preset
Control by pin 22 has priority over BUS control. H-DUTY Switches horizontal output duty. 0: 41%, YUV-SW 1: 47% INPUT-1 1: INPUT-2 (Y2/Cb2/Cr2) 41%
Switches YUV input. 0: INPUT-1 (Y1/Cb1/Cr1), Switches DAC control output.
DAC 1
0: Open (high),
1: On (low)
When TEST = 00, controls 1-bit DAC when output is open-collector. When TEST = 01, outputs H/C-SYNC from pin 28. Switches DAC control output.
Open
DAC 2
0: On (low),
1: Open (high)
When TEST = 00, controls 1-bit DAC when output is open-collector. When TEST = 01, outputs ACB reference pulse from pin 36. Selects sync input.
On
SYNC INPUT-SW
00: Selects HD1/VD1 input. 01: Selects HD2/VD2 input. 10/11: Selects SYNC input.
HD/VD1
HORIZONTAL POSITION
Adjusts horizontal picture phase. 0000000 (-10%)~1111111 (+10%) Switches clamp pulse phase. 0: 0.8-s (2.7%) width with 1-s (3.4%) delay from HD stop phase
Center
CLP-PHS
1: 0.8-s (2.7%) width with 0.5-s (1.7%) delay from HD stop phase While quiescent, 0.8-s (2.7%) width with 1-s (3.4%) delay from FBP start phase Also switches CP phase of SCP-OUT (pin 18). Sets ACB mode. Selects reference level for convergence.
1-s delay
ACB MODE
00: ACB off (cutoff BUS control), 10: ACB on (10 IRE),
01: ACB on (5 IRE),
ACB on (10 IRE)
11: ACB on (20 IRE)
Switches SCP (sandcastle pulse) mode. SCP-SW 0: Internal mode, 1: External input mode Inside IC
Also switches SCP-OUT (pin 18). HBP-PHS Switches horizontal black peak detection pulse phase. 0: 6% of FBP, 1: 3% of FBP 6% width
SYNC SEP-LEVEL
Selects SYNC separation level. 00: 30%, Test mode When TEST = 00, controls 1-bit DAC when output is open-collector. 01: 40%, 10: 50%, 11: 60%
30%
TEST
When TEST = 01, outputs H-SYNC from pin 28 and ACB reference pulse from pin 00 36. Do not use TEST = 10/11 because this is used for IC Shipment Test mode.
2000-07-20
24/113
TA1316AN
Parameter Adjusts vertical BLK stop phase. V-BLK PHASE 00000 (16H) ~11110 (46H) (1 H/STEP), 11111: Internal V-BLK off V-FREQUENCY COMPRESSION-BLK PHASE-1/2 P-MODE1/2 Vertical free-running frequency. Sets vertical pull-in range (Table 1). Adjusts compression BLK phase. Adjusts BLK at top and bottom (Table 2). 1281 H Off 32 H Explanation Preset
Selects picture mode. Selects between picture mute, half-tone, blue background, P-MUTE 1 and Y mute (Table 3). Adjusts unicolor. 0000000 (-15.5dB) ~111 (0dB) min
UNI-COLOR
BRIGHTNESS
Adjusts brightness. 00000000 (-40 IRE) ~11111111 (+40 IRE)
Center
OSD-ACL
Turns OSD-ACL on/off. 0: Off, 1: On
On
Adjusts color. COLOR 0000000: Color mute, 0000001 (-20dB or more) ~1111111 (+4.5dB) TINT Adjusts tint. 0000000 (-32 deg) ~1111111 (+32 deg) RGB-ACL Switches analog RGB-ACL sensitivity. 0: -6dB, 1: Normal -6 dB Center C-MUTE
PICTURE-SHARPNESS
Adjusts sharpness. 0000000 (-10dB or more) ~1111111 (+15dB (at peak FREQ) ) YNR: Turns luminance (Y) noise reduction (NR) on/off. 0: Off, 1: On
Center
YNR
Lower two bits of PICTURE-SHARPNESS (09-D2/D1) = 00: Trap (at peak FREQ) = 11: Flat YNR level is controlled by lower two bits (09-D2) of PICTURE-SHARPNESS. DL-APACON gain control by PICTURE-SHARPNESS is invalid.
Off
RGB-BRIGHTNESS
Adjusts RGB brightness. 0000000 (-20 IRE) ~1111111 (+20 IRE)
Center
DCRR-SW
Switches DC restoration rate. 0: 100% or more, 1: 100% or less
100% or more
HI BRT
Turns high bright color on/off. 0: Off, 1: On
On
RGB-CONTRAST
Adjusts RGB contrast. 0000000 (-17dB) ~1111111 (0dB)
min
SUB-CONTRAST
Adjusts sub-contrast. 00000 (-3.4dB) ~11111 (+2.6dB)
Center
WPS
Adjusts WPS level. 0: 110 IRE 1: 130 IRE
110 IRE
Selects Y/color difference signal input mode. YUV INPUT MODE 00: Y/Cb/Cr, 01: Y/Pb/Pr, 10: Through, 11: Y/U/V (TA1270) Y/Cb/Cr
Control by pin takes priority. DRIVE GAIN1/2 Adjusts drive gain 1 and drive gain 2. 0000000 (-5dB) ~1111111 (+3dB) Center
2000-07-20
25/113
TA1316AN
Parameter DR-R DR-B/G Adjusts R/G/B cutoff. 1) RGB-OUT when ACB off R/G/B CUT OFF 00000000 (1.9 V) ~11111111 (2.9 V) 2)SENS-IN when ACB on 00000000 (0.5 Vp-p) ~11111111 (1.5 Vp-p) R-Y/B-Y GAIN Adjusts R-Y/B-Y relative amplitude. 0000 (0.56) ~1111 (0.86) R-Y/B-Y PHASE Adjusts R-Y/B-Y relative phase. 0000 (90 deg) ~1111 (109 deg) G-Y/B-Y GAIN Adjusts G-Y/B-Y relative amplitude. 0000 (0.30) ~1111 (0.45) G-Y/B-Y PHASE Adjusts G-Y/B-Y relative phase. 0000 (232.5 deg) ~1111 (255 deg) COLOR SRT GAIN Adjusts color SRT gain. 000 (min) ~111 (max) C-SRT-FREQ Selects color SRT peak frequency. 00: 4.3 MHz, COLOR 01: 5.8 MHz, 10: 8.4 MHz, 11: Off Off 11: 0.52 Vp-p 1.65 Vp-p 4.3 MHz Center 232.5 deg 0.38 90 deg 0.74 Center Explanation Switches reference RGB drive gain (Table 4). R Preset
Selects color correction point. 00: Off, 01: 0.23 Vp-p, 10: 0.37 Vp-p,
CLT
Switches color limiter level. 0: 1.65 Vp-p, 1: 2 Vp-p
CDE
Adjusts color detail enhancer. 00: min 11: max
Center
Selects dynamic Y/C compensation. Y/C GAIN COMP1/2 COMP1, COMP2, 00: Off, 00: Off, 01: min, 01: min, 10: mid, 10: mid, 11: max 11: max All off
Selects flesh color. FRESH-COLOR 00: Off, 01: 33.7 deg, Normal, 11: 9.5 deg, Normal -7.5 ns Off
10: 9.5 deg, High, VSM-PHASE Adjusts VSM phase.
000 (-37.5 ns) ~101 (normal) ~111 (+15 ns) VSM GAIN Adjusts VSM gain. 000: OFF, APACON PEAK f0 001: +3 dB, 111: +19 dB
Off
Selects APACON peak frequency. 00: 13.5 MHz, 01: 9.5 MHz, 10: 7.3 MHz, 11: 4.7 MHz
13.5 MHz
DC REST POINT
DC restoration point 000: 0%, 111: 47%
26%
DC REST RATE
Adjusts DC restoration rate. 000 (100%) ~111 (135% (65%) )
100%
DC REST LIMIT
Selects DC restoration limit point. 00: 60%, 01: 73, 10: 87%, 11: 100%
60%
BLACK STRETCH POINT
Adjusts black stretch point 1. 000: OFF, 001 (22 IRE) ~111 (56 IRE)
40 IRE
2000-07-20
26/113
TA1316AN
Parameter APL VS BSP Adjusts black stretch point 2. 00 (0 IRE) ~11 (23 IRE) up Turns black level automatic correction on/off. B.L.C Max: 7.5 IRE, black stretch has priority. 0: Off, B.D.L. 1: On 3 IRE Off Explanation 0 IRE Preset
Switches black detection level. 0: 3 IRE, 1: 0 IRE
BS-ARE
Turns black stretch area on/off. 0: On, 1: Off
On
SHR-TRACKING
SHR tracking (adjusts SRT component gain.) 00 (SRT-GAIN max) ~11 (SRT-GAIN min)
Center
WPL-LEVEL
Adjusts white letter improvement amplitude. 000: min 111: max
min
WPL-FREQ
Adjusts white letter improvement start frequency. 000 (5 MHz) ~111 (16 MHz)
5 MHz
DYNAMIC ABL POINT
Adjusts dynamic ABL detection voltage. 000 (min) ~111 (max)
Center
DYNAMIC ABL GAIN
Adjusts dynamic ABL sensitivity. 000 (min) ~111 (max)
min
ABL POINT
Adjusts ABL detection voltage. 000 (min) ~111 (max)
Center
ABL GAIN
Adjusts ABL sensitivity. 000 (min) ~111 (max)
min
RGB-OUT MODE
Switches RGB output mode (switch for RGB output mode for test and adjustment). 00: Normal, 01: R only, 10: G only, 11: B only
Normal
DYNC-POINT
Switches dynamic Y point. 00: 20 IRE, 01: 21.5 IRE, 10: 23.5 IRE, 11: 25 IRE
23.5 IRE
Turns dynamic Y gain VS dark area on/off. DYNC GAIN VS DARK AREA 000 (Off) ~ 111 (max (when 25 IRE or below is 25% or more of area ratio, +3dB) ) STATIC-GAIN Turns static Y dark area gain on/off. 00: Off (0dB) Y-out 11: max (1.5dB, at this time, DYNC gain is +1.5dB max) Off Off
Turns Y-out on/off. 0: Off, 1: On
Off
OSD BRIGHT
Adjusts OSD brightness. 00: 5 IRE, 01: 0 IRE, 10: -5 IRE, 11: -10 IRE
-5 IRE
OSD-CONTRAST
Adjusts OSD contrast. 00 (min (-9.5dB) ) ~11 (max (0dB) ) Adjusts Y/C phase: Y phase is adjusted. (Y/CDL1 are the two least significant bits.) 00: -10 ns, 01: -5 ns, 10: 0 ns, 11: +5 ns
min
Y/C DL1/2
-10 ns
APACON WPL
Adjusts APACON white peak limiter. 000 (Off) ~111 (Maximum effect of positive limiter)
Off
2000-07-20
27/113
TA1316AN
Parameter Explanation Controls Y detail: Adjusts differential signal for frequency other than picture sharpness. Y DETAIL CONTROL 00000 (min (trap) ) ~11111 (max (+6dB) ) Peak frequency linked to APACON PEAK FREQ 00: 5.5 MHz, WP BLUE POINT 01: 3.7 MHz, 10: 14.5 MHz, 11: 10 MHz min Center Preset
Adjusts white peak blue point. 000 (55 IRE) ~111 (105 IRE) Corrects Y group delay.
Y-GROUP DELAY CORRECTION
0000: Decreases preshoot gain (increases overshoot gain). 1111: Decreases overshoot gain (increases preshoot gain).
Center
WP BLUE GAIN
Adjusts white peak blue gain. 000 (min (+2 dB) ) ~111 (max (+9.5 dB) )
min
Table 1: Vertical Frequency
Data 000 001 010 011 100 101 110 111 V PULL-IN Range Start Phase 48~1281H 48~849H 48~725H 48~660H 48~613H 48~363H 48~307H VP-OUT HI 1100H 730H 600H 545H 500H 290H 240H V-BLK P. (C.BLK P.) +20 H V-BPP Stop Phase 1125P/30 Hz (33.75 kHz) 750P/60 Hz (45 kHz) 625P/50 Hz (31.5 kHz) 1125I/60 Hz (33.75 kHz) 525P/60 Hz (31.5 kHz) PAL/SECAM/50 Hz (15.625 kHz), 100 Hz (31.5 kHz) NTSC/60 Hz (15.734 kHz), 120 Hz (31.5 kHz) Format/V-FREQUENCY, H-FREQUENCY
Table 2: Compression-BLK Phase
V-FREQUENCY 000 001 010 011 100 101 110 111 PHASE-1 (start phase) 1088H~1118H 720H~750H 592H~622H 528H~558H 488H~518H 280H~310H 224H~254H C-BLK OFF 50H~78H (0000: C-BLK OFF) PHASE-2 (stop phase)
2000-07-20
28/113
TA1316AN
Table 3: P-Mode
05-D7 1A-D1 1A-D0 MODE Details Can mute picture or half-tone main signal using YM pin. 0 0 0 NORMAL 1 Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2. Analog RGB-IN > P-Mute Mutes main signal Y in whole picture using BUS. 0 0 1 Y-MUTE Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2. Analog RGB-IN > P-Mute Half-tones main signal in whole picture using BUS. Can insert P-Mute using YM pin. 0 1 0 YM 1 Can insert analog RGB-IN using Ys3. Blends OSD-IN with main H/T signal using Ys1/Ys2. Analog RGB-IN > P-Mute Blue-backs main signal using BUS. 0 1 1 BB Can insert P-Mute using YM pin. Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2. Analog RGB-IN > P-Mute Mutes main signal in whole picture using BUS. 1 0 0 P-MUTE 1 Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2. Analog RGB-IN > P-Mute 1 1 1 0 1 1 1 0 1 YM2 P-MUTE 2 NORMAL 2 Cannot be used. Cannot be used. Cannot be used.
Output priority: main signal < BB < P-MUTE < RGB-IN < OSD-IN
2000-07-20
29/113
TA1316AN
Table 4: DR-R, DR-B/G
0D-D0 0 0 1 1 0E-D0 0 1 0 1 Reference Axis R R G B Drive Gain1 G G R G Drive Gain2 B B B R
Read Mode
Parameter Power-on reset POR 0: Register preset, 1: Normal Explanation
After power-on, 0 is read on first read; 1 on subsequent reads. IK-IN IK input detection: detects input to pin 45. 0: NG (no input), 1: OK (input)
RGB-OUT self-check result: detects output from pins 41, 42 and 43. RGB-OUT 0: NG (no output), 1: OK (output)
Returns OK when signal is detected on all three outputs. If signals are small, does not return OK. YUV-IN self-check result: detects input to pins 3, 4 and 5 or pins 8, 9 and 10. YUV-IN 0: NG (no input), 1: OK (input)
Returns OK when AC signal is detected on all three inputs. If signals are small or are DC voltage, does not return OK. H-OUT H-OUT self-check result: detects output from pin 26. 0: NG (no output), VP-OUT 1: OK (output)
VP-OUT self-check result: detects output from pin 27. 0: NG (no output), 1: OK (output)
RGB-IN self-check result: detects input to pins 33, 34 and 35. RGB-IN 0: NG (no input), 1: OK (input)
Returns OK when AC signal is detected on all three inputs. If signals are small or are DC voltage, does not return OK. SYNC-IN SYNC-IN self-check result: detects input to pin 14. 0: NG (no input), 1: OK (input)
2000-07-20
30/113
TA1316AN
Data Transfer Format via I C BUS
Slave Address: 88H
A6 1 A5 0 A4 0 A3 0 A2 1 A1 0 A0 0 W/R 0/1
2
Start and Stop Condition
SDA
SCL S Start condition P Stop condition
Bit Transfer
SDA
SCL
SDA stable
Change of SDA allowed
Acknowledge
SDA by transmitter
Bit 9: High-impedance
SDA by receiver Bit 9 only: Low-impedance
SCL from master S
1
8
9 Clock pulse for acknowledge
2000-07-20
31/113
TA1316AN
Data Transmit Format 1
S
Slave address 7 bits
0A
Sub address 8 bits
A
Transmit data 9 bits MSB
AP
MSB S: Start condition
MSB A: Acknowledge
P: Stop condition
Data Transmit Format 2
S Slave address 0A Sub address A Transmit data A A AP
Sub address
Transmit data n
Data Receive Format
S Slave address 7 bits MSB 1A Transmit data 1 8 bits MSB A Transmit data 2 AP
At the moment of the first acknowledge, the master transmitter becomes a master receiver and a slave transmitter. The Stop condition is generated by the master. Details are provided in the Philips I2C specifications.
Optional Data Transmit Format: Automatic Increment Mode
S Slave address 7 bits MSB 0A1 Slave address 7 bits A Transmit data 1 8 bits MSB Transmit data 2 8 bits MSB AP
MSB
In this transmission method, data is set on automatically incremented sub-address from the specified sub-address. Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
2000-07-20
32/113
TA1316AN
Maximum Ratings (Ta = 25C)
Characteristics Power supply voltage Input pin signal voltage Power dissipation Power dissipation reduction rate Operating temperature Storage temperature Power supply voltage (Pins 19, 40, 55) Symbol PCB A VCCmax einmax PD (Note1) 1/ja Topr Tstg min typ. max 12 9 2551 20.4 -20~65 -55~150 8.5 8.8 9.1 PCB B 12 9 2717 21.7 -20~65 -55~150 8.7 9.0 9.3 PCB C 12 9 3378 27.0 -20~65 -55~150 8.7 9.0 9.3 V V Vp-p mW mW/C C C Unit
Note 1: Please see the following Figure. Note, however, that the conditions apply only to the case where the device is mounted on board A (180 mm x 125 mm x 1.6 mm, one-sided); board B (329 mm x 249 mm x 1.6 mm, two-sided); or board C (276 mm x 192 mm x 1.6 mm, six-layered). When mounting the IC, select boards no smaller than these. When using under the conditions of board A, set the IC's power supply voltage (pins 19, 40, 55) to 8.8 V (0.3 V) Because the IC's thermal capacity margin is narrow, when designing a set, incorporate heat discharge features into the design. Note that the power dissipation varies widely depending on the board mounting conditions.
3378
Printed circuit board B
2717
Printed circuit board C
(mW) Power dissipation PD
2551 2297 1848 1735
Printed circuit board A
0 0
25
65
150
Ambient temperature Ta (C)
Figure 1
Characteristics of decrease in power dissipation
Note 2: Pins 3, 4, 5, 7, 8, 9, 10, 11, 20, 21, 22, 23, 30, 31, 33, 34, 36, 39, 45, 46, 49, 50, 51, 52 and 53 are susceptible to damage from surge voltages and should thus be handled with extreme care.
2000-07-20
33/113
TA1316AN
Note 3: Power supply sequence At power-on, power should be supplied to the IC's power supply pins according to the following sequence: 2 first to pin 29 (I L VDD), then to pin 19 (EDF/DAC VCC), and finally to pin 40/pin 55 (RGB VCC/YC VCC). It is recommended that power be supplied to pin 29 from the 9-V power supply to pin 19 via a zener diode. If power is not supplied to all the power pins or if power is not supplied in the above sequence, the IC may not function properly.
V DEF VCC
H-out output
5.2 V (typ.)
Power-on reset (POR) threshold voltage for bus operation 3.3 V (typ.) Logic operation 1.5 V (typ.)
I L VCC
2
t
Figure 2 Timing from immediately after power-on to time at which H-out is output (at Ta = 25C)
2000-07-20
34/113
TA1316AN
Recommended Operating Conditions
Characteristics Pins 19, 40 and 55 Supply voltage (VCC) Pin 29 Y input level Color difference signal input level Matrix switching voltage HD/VD input level SYNC input level SCP input level Pins 3 and 8: 100% color bar, including sync (picture signal: 0.7 Vp-p) Pins 4, 5, 9 and 10: 100% color bar, no sync Pin 7 Pins 12, 13, 15 and 16 Pin 14: 100% color bar, including sync Pin 17 CP BPP 15.75 kHz Horizontal frequency switching voltage Pin 22 31.5 kHz 33.75 kHz 45 kHz FBP input level H-OUT input current DAC input current SCL/SDA pull-up voltage Analog RGB input level Analog OSD input level YS3 switching voltage YS1/2 switching voltage Pin 24 Pin 26 Pins 28 and 36 Pins 30 and 31 Pins 35, 34 and 33: White 100% Pins 37, 38 and 39: White 100% Pin 49 Pins 51 and 50 OSD VSM MUTE BLK YM switching voltage Pin 52 P-MUTE HALF TONE H-AFC H-BLK Description Board A (Note1) Boards B and C (Note1) Min 8.5 8.7 1.8 2.0 2.0 0.9 4.7 2.2 8.0 5.0 2.0 0 4.0 1.7 3.3 1.5 2.7 1.2 6.7 2.5 1.2 Typ. 8.8 9.0 2.0 1.0 0.7 3.0 5.0 1.0 5.0 2.5 9.0 6.0 3.0 0 5.0 2.25 9.0 0.3 5.0 0.7 0.7 5.0 5.0 1.5 9.0 3.2 1.5 Max 9.1 9.3 2.2 5.0 9.0 1.1 9.0 2.8 9.0 7.0 4.0 1.0 9.0 2.8 15.0 1.0 9.0 9.0 9.0 1.8 9.0 5.0 1.8 V V Vp-p mA V V Vp-p V Unit
Vp-p
Note1: For the parameter values for boards A, B and C, please refer to the table entitled Maximum Ratings.
Electrical Characteristics (VCC = 9 V/2 V, Ta = 25C, unless otherwise specified) Current Dissipation
Pin Name DEF/DAC VCC RGB VCC I L VDD Y/C VCC
2
Symbol ICC1 ICC2 ICC3 ICC4
Test Circuit
Min 21.0 55.3 21.0 39.3
Typ. 24.2 63.6 24.1 45.3
Max 26.9 70.8 26.8 50.3
Unit
mA
2000-07-20
35/113
TA1316AN
Pin Voltage
Test Condition
(1) (2) BUS = Preset SW1 = B, SW2 = B, SW3 = C, SW4 = B, SW5 = B, SW7 = A, SW8~10 = B, SW14 = B, SW20 = ON, SW23 = B, SW24 = A, SW26 = A, SW33~35 = A, SW37~39 = A, SW54 = OFF, SW56 = ON
Pin Name BPH FILTER Y1 IN Cb/Pb1 IN Cr/Pr1 IN MATRIX SW Y2 IN Cb/Pb2 IN Cr/Pr2 IN COLOR LIMITER VD2 IN HD2 IN SYNC IN VD1 IN HD1 IN SCP IN AFC FILTER HVCO H CURVE CORRECTION ANALOG B IN ANALOG G IN ANALOG R IN ANALOG OSD B IN ANALOG OSD G IN ANALOG OSD R IN B S/H G S/H R S/H YS3 YS2 YS1 YM ABCL IN VSM OUT APL FILTER Symbol V2 V3 V4 V5 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V20 V21 V23 V33 V34 V35 V37 V38 V39 V46 V47 V48 V49 V50 V51 V52 V53 V54 V56 Test Circuit Min 5.5 4.7 4.7 4.7 2.0 4.7 4.7 4.7 6.65 0 0 1.6 0 0 3.9 5.8 5.0 2.2 3.65 3.65 3.65 3.65 3.65 3.65 3.5 3.5 3.5 0.0 0.0 0.0 0.0 5.85 4.2 4.8 Typ. 5.8 5.0 5.0 5.0 3.0 5.0 5.0 5.0 6.9 0 0 2.0 0 0 4.4 6.5 5.3 2.5 3.95 3.95 3.95 3.95 3.95 3.95 4.0 4.0 4.0 0.1 0.1 0.1 0.1 6.1 4.4 5.0 Max 6.1 5.3 5.3 5.3 4.0 5.3 5.3 5.3 7.15 0.3 0.3 2.4 0.3 0.3 4.9 7.2 5.6 2.8 4.25 4.25 4.25 4.25 4.25 4.25 4.5 4.5 4.5 0.2 0.2 0.2 0.2 6.35 4.6 5.2 V Unit
Pin No. 2 3 4 5 7 8 9 10 11 12 13 14 15 16 17 20 21 23 33 34 35 37 38 39 46 47 48 49 50 51 52 53 54 56

2000-07-20
36/113
TA1316AN
Luminance Block
Characteristics Y input dynamic range Black detection level shift Black stretch amplifier maximum gain Black stretch start point 1 Symbol DRY VB VB3 GBS PBST1 PBST2 Black stretch start point 2 PBS1 PBS2 DV001 Dynamic ABL detection voltage DV010 DV100 Dynamic ABL sensitivity Black level correction SDAMIN SDAMAX BLC PDGP00 Dynamic Y correction point PDGPA PDGPB PDGPC Dynamic Y gain Static Y dark area gain GDG GSG ADT100 DC restoration gain ADT135 ADT65 DC restoration start point VDT0 VDT1 PDTL11 DC restoration limit point PDTL10 PDTL01 PDTL00 FAP00 Sharpness control peak frequency FAP01 FAP10 FAP11 GMAX00 GMIN00 GMAX01 Sharpness control range GMIN01 GMAX10 GMIN10 GMAX11 GMIN11 Test Circuit (Note P14) (Note P13) 74 74 12.2 8.5 6.5 4.2 13 -15 14 -20 14 -25 14 -30 78 78 13.5 9.5 7.3 4.7 16 -8 17 -14 17 -16 18 -20 82 82 14.9 10.5 MHz 8.1 5.2 18 -4 19 -7 19 -7 20 -8 dB (Note P12) (Note P11) (Note P09) (Note P10) (Note P08) 2 3 2 1.3 0.9 1.2 0.55 -5 47 54 67 3.5 5 3 1.7 1.1 1.35 0.7 0 51 57 71 5 7 4 2.2 1.2 1.5 0.85 5 55 61 75 % % times dB dB (Note P06) (Note P07) (Note P05) Test Condition (Note P01) (Note P02) (Note P03) Min 0.7 -15 35 2.5 31 50 (Note P04) 0 19 30 80 190 0.29 7.0 17 0.5 Typ. 1.0 -5 45 3.0 34 53 5 24 50 100 220 0.005 0.32 8.5 20 1.5 Max 1.5 5 55 3.5 37 56 10 29 70 120 250 0.02 0.35 10 23 2.5 IRE IRE V/V mV IRE dB IRE Unit Vp-p mV
2000-07-20
37/113
TA1316AN
Characteristics Symbol GCEN00 Sharpness control center characteristic GCEN01 GCEN10 GCEN11 GYNRT00 GYNRF00 GYNRT01 YNR characteristic GYNRF01 GYNRT10 GYNRF10 GYNRT11 GYNRF11 TSRT00 Control of SRT response to 2T pulse input TSRT01 TSRT10 TSRT11 VSM peak frequency FVSM GV000 GV001 GV010 VSM gain GV011 GV100 GV101 GV110 GV111 VSR49 Threshold voltage of VSM muting VSR50 VSR51 TVM49A TVM49B Response time for VSM muting TVM50A TVM50B TVM51A TVM51B VSM limit Delay time from Y input to R output VLU VLD TYR YDLA Y delay time switch YDLB YDLC GAMIN Transfer distortion correction GBMIN GAMAX GBMA X Test Circuit (Note P23) 0.3 -3.0 1.0 -1.5 1.7 -1.0 (Note P22) (Note P20) (Note P21) (Note P19) 0 0 0 0.58 0.55 96 3 7 11 -5 1 30 30 30 0.65 0.62 120 5 10 15 -3.2 2 100 100 100 0.75 0.75 144 7 13 19 -2.0 3.5 dB ns Vp-p ns Pins 49, 50 and 51 (Note P18) (Note P17) 1.5 3.5 15 2 5.5 9.5 12.5 14.5 15.5 17.5 0.62 0.62 0.62 0 0 0 2 5 19 -39 3 6.5 11 13.8 16 16.8 18.6 0.72 0.72 0.72 30 30 30 4 7 22.8 -35 4 7.5 12 15 17.5 18.5 19.5 0.85 0.85 0.85 100 100 100 ns V dB MHz (Note P16) (Note P15) Test Condition Min 7.5 8 8 9 -15 -3 -20 -3 -20 -2 -25 -2 0.05 0.5 Typ. 10 11 11 12 -8 -1 -12 -1 -13 -0.5 -12 0 0.4 1 Max 12.5 13 13 14 -4 1 -8 1 -8 1.5 -8 2 0.7 2 dB dB dB Unit
2000-07-20
38/113
TA1316AN
Characteristics Symbol GCDE00 Color detail enhancer GCDE01 GCDE10 GCDE11 FYD00 Y detail frequency FYD01 FYD10 FYD11 GYDMAX00 GYDMAX01 GYDMAX10 GYDMAX11 GYDCEN00 Y detail control range GYDCEN01 GYDCEN10 GYDCEN11 GYDMIN00 GYDMIN01 GYDMIN10 GYDMIN11 GWPL1 APACON white peak limiter GWPL2 GWPL3 (Note P26) (Note P25) Test Circuit (Note P24) Test Condition Min 5.5 5.5 5.5 5.5 4.4 2.9 11.6 8 6 7 2.5 3 3.5 4 -2 -1 0 0 -8 -18 -10 -7 -5 Typ. 6.8 6.8 6.8 6.8 5.5 3.7 14.5 10 9 10 5.5 6 6.5 7 0.8 1 1.5 2 -5 -15 -7 -4.8 -2.3 Max 8 8 8 8 6.6 4.5 MHz 17.4 12 12 13 8.5 9 9.5 10 dB 2 2 3 4 -2 -12 -4 -2 -0.5 dB dB Unit
2000-07-20
39/113
TA1316AN
Color Difference 1/YUV Input and Matrix Block
Characteristics Color difference signal input dynamic range Symbol DBB DRR TRMAX Color difference signal tint control characteristic TRMIN TBMAX TBMIN Matrix fast SW threshold voltage VMSW FB00 FB01 Color SRT peak frequency FB10 FR00 FR01 FR10 GSB00CEN GSB00MAX GSB01CEN GSB01MAX GSB10CEN Color SRT gain GSB10MAX GSR00CEN GSR00MAX GSR01CEN GSR01MAX GSR10CEN GSR10MAX Delay time from Cb1 input to B output Delay time from Cr1 input to R output TB TR Test Circuit (Note S01) 5 9 2 5 1 1 104 104 8 12 5 8 2 3 130 130 11 15 8 11 5 6 156 156 ns Pin 7 Test Condition Min 0.7 0.7 25 -37 27 -36 0.65 3.6 4.6 6.8 3.6 4.6 6.8 5 9 2 5 1 1 Typ. 0.9 0.9 29 -33 31 -32 0.72 4.5 5.8 8.5 4.5 5.8 8.5 8 12 5 8 2 3 Max 1 1 33 -29 35 -28 0.8 5.4 7.0 10.2 MHz 5.4 7.0 10.2 11 15 8 11 5 6 dB V Unit Vp-p
2000-07-20
40/113
TA1316AN
Characteristics Symbol GCBDY1 GCBDY2 GCBDY3 GCBBS1 GCBBS2 Color difference signal amplitude correction GCBBS3 GCRDY1 GCRDY2 GCRDY3 GCRBS1 GCRBS2 GCRBS3 GY00 GY01 GY10 GY11 YUV gain GBA GBB GBC GRA GRB GRC Test Circuit (Note S03) (Note S02) Test Condition Min 0.3 0.7 0.7 0.2 -1.0 -3.6 0.3 1.4 1.4 0.1 -1.2 -3.7 4.5 4.5 4.5 4.5 0.2 1.0 1.0 0.8 -1.6 -3.4 Typ. 0.5 1.0 1.0 0.4 -0.6 -3.3 0.5 1.6 1.6 0.3 -1.0 -3.3 5.5 5.5 5.5 5.5 0.4 1.1 1.1 1.0 -1.4 -3.2 Max 0.7 1.3 1.3 0.6 -0.5 -3.0 0.7 1.8 1.8 0.5 -0.8 -2.9 6 6 6 6 0.5 1.3 1.3 1.2 -1.2 -3.0 dB dB Unit
2000-07-20
41/113
TA1316AN
Color Difference 2 Block
Characteristics Color difference signal contrast adjustment characteristic Color adjustment characteristic Symbol VuCY vcCY+ vcCY- RMAX RCNT R-Y relative phase and amplitude RMIN VR/VBMAX VR/VBCNT VR/VBMIN GMAX GCNT G-Y relative phase and amplitude GMIN VG/vBMAX VG/vBCNT VG/vBMIN GHTRY Color difference signal half-tone characteristic GHTGY GHTBY V1 Color characteristic V2 V3 Color limiter characteristic High bright color gain CLT0 CLT1 HBC1 Test Circuit Test Condition (Note A01) Min 15.5 3.6 -35 109 98.5 88 0.82 0.68 0.51 253 245 229 0.35 0.30 0.25 0.47 (Note A03) 0.47 0.47 0.09 (Note A04) 0.26 0.44 0.60 (Note A05) (Note A06) 1.45 1.80 0.02 Typ. 17.0 4.6 -25 111.5 101 90 0.85 0.71 0.54 256 248 232 0.38 0.33 0.28 0.50 0.50 0.50 0.23 0.40 0.58 0.70 1.65 2.00 0.04 Max 18.5 5.6 -18 114 103.5 92 0.88 0.74 0.57 259 251 235 0.41 0.36 0.31 0.53 0.53 0.53 0.37 0.54 0.72 0.80 1.85 2.20 0.06 Vp-p times Vp-p times times times Unit dB
(Note A02)
dB

2000-07-20
42/113
TA1316AN
Text Block
Characteristics AC gain (Y1in~R/G/B out) Symbol GR GG GB AC gain axial difference GG/R GB/R Frequency characteristic (Y1in~R/G/B out) Frequency characteristics (Cb1/Cr1in~R/G/B out) Unicolor adjustment characteristic GfR GfG GfB GfCb GfCr Vu VbrMAX Brightness adjustment characteristic VbrCNT VbrMIN White peak slice level Black peak slice level Vwps1 Vwps2 Vbps N41 RGB output S/N N42 N43 Half-tone characteristic Half-tone ON voltage GHT1 GHT2 VHT VVR Vertical blanking pulse output level VVG VVB VHR Horizontal blanking pulse output level VHG VHB Blanking pulse delay time tdON tdOFF Sub-contrast variable range vsu+ vsu- CUT+ CUT- Test Circuit Test Condition Min 3.39 (Note T01) 3.39 3.39 0.94 0.94 24 Flat gain (-3 dB point at 10 MHz) 24 24 (Note T02) 11 11 15.5 4.10 (Note T03) 3.05 1.95 (Note T04) (Note T05) 2.30 2.70 1.05 (Note T06) (Note T07) Pin 52 0.45 0.45 0.65 0.30 Typ. 3.80 3.80 3.80 1.00 1.00 30 30 30 14.5 14.5 16.5 4.45 3.40 2.30 2.45 2.90 1.20 -55 -55 -55 0.50 0.50 0.85 0.80 0.80 0.80 0.80 0.80 0.80 0.00 0.08 2.6 -3.5 0.47 0.47 Max 4.28 4.28 4.28 1.06 1.06 17.5 4.80 3.75 2.65 2.65 3.10 1.35 -49 -49 -49 0.55 0.55 1.05 1.30 1.30 1.30 1.30 1.30 1.30 0.30 0.30 3.1 -3.0 0.52 0.52 s V V V times dB Vp-p V V MHz dB MHz times Unit

0.30 0.30 0.30
0.30 0.30 (Note T08) 2.1 -4.0 0.42 0.42

dB
Cutoff voltage variable range
V
2000-07-20
43/113
TA1316AN
Characteristics Symbol DRR1+ DRR1- DRR2+ DRR2- DRG1+ DRG1- DRG2+ Drive adjustment variable range DRG2- DRG3+ DRG3- DRB1+ DRB1- DRB2+ DRB2- DRB3+ DRB3- MURD Output voltage at picture muting MUGD MUBD P mute ON voltage VMUTE BBR Output voltage at blue back BBG BBB Pin 53 input impedance ACL characteristic Zin ACL1 ACL2 ABLP1 ABLP2 ABLP3 ABL point ABLP4 ABLP5 ABLP6 ABLP7 ABLP8 ABLG1 ABLG2 ABLG3 ABL gain ABLG4 ABLG5 ABLG6 ABLG7 ABLG8 Test Circuit Test Condition Min 2.5 -5.5 2.5 -5.5 2.5 -5.5 2.5 (Note T09) -5.5 2.5 -5.5 2.5 -5.5 2.5 -5.5 2.5 -5.5 1.5 Typ. 3.0 -5.0 3.0 -5.0 3.0 -5.0 3.0 -5.0 3.0 -5.0 3.0 -5.0 3.0 -5.0 3.0 -5.0 1.7 1.7 1.7 2.15 1.2 1.2 1.25 30 -5.5 -14.5 0.15 0.04 -0.02 -0.12 -0.22 -0.31 -0.39 -0.45 -0.02 -0.12 -0.29 -0.47 -0.63 -0.80 -0.96 -1.04 Max 3.5 -4.5 3.5 -4.5 3.5 -4.5 3.5 -4.5 3.5 -4.5 3.5 -4.5 3.5 -4.5 3.5 -4.5 1.9 1.9 1.9 2.40 1.4 1.4 1.4 36 -3.5 -12.0 0.20 0.09 0.03 -0.07 -0.17 -0.26 -0.34 -0.40 0.00 -0.07 -0.24 -0.42 -0.59 -0.75 -0.91 -0.99 V V Vp-p k dB V V V dB Unit

(Note T13) (Note T12) (Note T10) (Note T11) Pin 52
1.5 1.5 1.90 1.0
1.0 1.1 24 -7.5 -16.0 0.10 -0.01 -0.07 -0.17 -0.27 -0.36 -0.44 -0.50 -0.06 -0.17 -0.34 -0.52 -0.68 -0.85 -1.01 -1.09
2000-07-20
44/113
TA1316AN
Characteristics Symbol V43R V42R V41R V43G RGB output mode V42G V41G V43B V42B V41B 1 2 Y-OUT characteristic 1 2 3 BSPmin BSPcnt Blue stretch circuit characteristic BSPmax BSGmin BSGcnt BSGmax Forced blanking input threshold voltage VBLKIN ACBR ACBG ACBB VACB1R VACB1G ACB pulse phase and amplitude VACB1B VACB2R VACB2G VACB2B VACB3R VACB3G VACB3B IKR IK input amplitude IKG IKB IK input cover range DIKin+ DIKin- Test Circuit Test Condition Min 2.15 0.30 0.30 0.30 (Note T14) 2.15 0.30 0.30 0.30 2.15 56 72 (Note T15) 0.49 -1.67 -4.59 55.0 92.5 (Note T16) 107 1.75 6.4 9 Pin 52 5.50 0.04 0.04 0.04 (Note T17) 0.16 0.16 0.16 0.41 0.41 0.41 0.73 (Note T18) 0.73 0.73 (Note T19) 3.00 -0.50 0.21 0.21 0.21 0.46 0.46 0.46 0.93 0.93 0.93 3.30 -0.30 0.26 0.26 0.26 0.51 0.51 0.51 1.13 1.13 1.13 3.60 -0.10 V Vp-p Vp-p Typ. 2.40 0.80 0.80 0.80 2.40 0.80 0.80 0.80 2.40 66 82 1.24 -0.92 -3.84 60.0 97.5 112 2.25 7.4 10 6.00 1 2 3 0.07 0.07 0.07 Max 2.65 1.30 1.30 1.30 2.65 1.30 1.30 1.30 2.65 76 92 1.99 -0.17 -3.09 65.0 102.5 117 2.75 8.4 11 6.50 0.10 0.10 0.10 H V dB IRE dB IRE V Unit

2000-07-20
45/113
TA1316AN
Characteristics Symbol GTXR Analog RGB gain GTXG GTXB Analog RGB gain triaxial difference GTXG/R GTXB/R GfTXR Analog RGB frequency characteristic GfTXG GfTXB DR35 Analog RGB input dynamic range DR34 DR33 TXVWPSR Analog RGB white peak slice level TXVWPSG TXVWPSB VBPSR Analog RGB black peak limit level VBPSG VBPSB vuTXR RGB contrast adjustment characteristic vuTXG vuTXB VbrTXmax Analog RGB brightness adjustment characteristic Analog RGB mode switch voltage VbrTXcnt VbrTXmin VTXON RYS tPRYS Analog RGB mode switching transfer characteristic tRYS FYS tPRYS tRYS TXACL1 Text ACL characteristic TXACL2 TXACL3 TXACL4 GOSDR Analog OSD gain GOSDG GOSDB Analog OSD gain triaxial difference GOSDG/R GOSDB/R Test Circuit Test Condition Min 3.03 (Note T20) 3.03 3.03 0.94 0.94 30 At -3dB 30 30 0.80 0.80 0.80 2.30 (Note T21) 2.30 2.30 1.05 (Note T22) 1.05 1.05 15.5 (Note T23) 15.5 15.5 3.0 (Note T24) 2.5 2.0 Pin 49 0.65 (Note T25) -2.00 (Note T26) -7.5 -6.0 -17 2.95 (Note T27) 2.95 2.95 0.94 0.94 Typ. 3.40 3.40 3.40 1.00 1.00 35 35 35 1.20 1.20 1.20 2.55 2.55 2.55 1.20 1.20 1.20 16.5 16.5 16.5 3.2 2.7 2.2 0.85 15 20 0 10 30 0 -1.00 -5.5 -4.0 -15 3.30 3.30 3.30 1.00 1.00 Max 3.83 3.83 3.83 1.06 1.06 1.50 1.50 1.50 2.80 2.80 2.80 1.35 1.35 1.35 18.5 18.5 18.5 3.4 2.9 2.4 1.05 50 50 10 ns 50 50 10 -0.05 -3.5 -2.0 -13 3.70 3.70 3.70 1.06 1.06 times dB V V dB V Vp-p Vp-p MHz times Unit

2000-07-20
46/113
TA1316AN
Characteristics Symbol GfOSDR Analog OSD frequency characteristic GfOSDG GfOSDB DR35 Analog OSD input dynamic range DR34 DR33 OSDVWPSR Analog OSD input white peak slice level OSDVWPSG OSDVWPSB OSDVBPSR Analog OSD input black peak limit level OSDVBPSG OSDVBPSB VUOSDR11 VUOSDG11 VUOSDB11 VUOSDR10 VUOSDG10 Analog OSD contrast adjustment characteristic VUOSDB10 VUOSDR01 VUOSDG01 VUOSDB01 VUOSDR00 VUOSDG00 VUOSDB00 VbrOSD0 Analog OSD brightness adjustment characteristic VbrOSD1 VbrOSD2 VbrOSD3 Analog OSD mode switch voltage VOSDON1 VOSDON2 Test Circuit Test Condition Min 35 At -3dB 35 35 0.80 0.80 0.80 2.45 (Note T28) 2.45 2.45 1.30 (Note T29) 1.30 1.30 0.58 0.58 0.58 0.47 0.47 0.47 (Note T30) 0.32 0.32 0.32 0.21 0.21 0.21 2.20 2.05 (Note T31) 1.95 1.80 Pin 51 Pin 50 2.05 2.05 2.15 2.00 2.30 2.30 2.35 2.20 2.55 2.55 V 0.38 0.38 0.38 0.23 0.23 0.23 2.40 2.25 0.46 0.46 0.46 0.25 0.25 0.25 2.60 2.45 V Typ. 40 40 40 1.20 1.20 1.20 2.70 2.70 2.70 1.45 1.45 1.45 0.64 0.64 0.64 0.53 0.53 0.53 Max 1.50 1.50 1.50 2.95 2.95 2.95 1.60 1.60 1.60 0.71 0.71 0.71 0.59 0.59 0.59 Vp-p V Vp-p Vp-p MHz Unit

2000-07-20
47/113
TA1316AN
Characteristics Symbol RYS1 tPRYS1 tPRYS1 FYS1 tPRYS1 tPRYS1 RYS2 tPRYS2 Analog OSD mode switching transfer characteristic tPRYS2 FYS2 tPRYS2 tPRYS2 tROSD tPROSD tPROSD FOSD tPROSD tPROSD OSDACL1 OSD ACL characteristic OSDACL2 OSDACL3 OSDACL4 41TV1 42TV1 43TV1 41TV2 42TV2 43TV2 41TV3 42TV3 OSD blending characteristic 43TV3 41OSD1 42OSD1 43OSD1 41OSD2 42OSD2 43OSD2 41OSD3 42OSD3 43OSD3 Crosstalk between inputs Test Circuit Test Condition Min Typ. 15 20 0 10 30 0 15 20 0 10 30 0 20 15 0 20 20 0 0.00 0.00 -5.5 -15 -6 -6 -6 -3 -3 -3 -55 -55 -55 -5.5 -5.5 -5.5 -10.5 -10.5 -10.5 -40 -40 -40 -50 Max 50 50 10 50 50 10 50 50 10 50 50 10 50 50 10 50 50 10 ns Unit

(Note T34) (Note T33) (Note T32)

-8.0 -17 -7 -7 -7 -4 -4 -4

-3.0 -13 -5 -5 -5 -2 -2 -2 -50 -50 -50 -4.5 -4.5 -4.5 -9.0 -9.0 -9.0 -30 -30 -30 -40 dB dB dB

-6.5 -6.5 -6.5 -12.0 -12.0 -12.0

2000-07-20
48/113
TA1316AN
Deflection Block
Parameter Sync input horizontal sync phase HD 1/2 input horizontal sync phase Symbol SPH HD1PH/2PH HDDUTY1 Polarity detection range HDDUTY2 HDDUTY3 HDDUTY4 VthS00 Sync input threshold amplitude VthS01 VthS10 VthS11 HD 1/2 input threshold voltage Horizontal picture phase adjustment variable range Curve correction amount VthHD1/2 HSFT- HSFT+ H#23 CPS0 CPW0 CPV0 CPS1 Clamp pulse phase, width and level CPW1 CPV1 CPS2 CPW2 CPV2 HBPS0a HBPW0b HBPV0 HBPS1a Black peak detection pulse phase and level HBPW1b HBPV1 HBPs45a HBPs45b HBPsv45 FBP threshold HVCO oscillation start voltage H-OUT start voltage VthFBP VVCO VHON Test Circuit (Note HA03) Test Condition (Note HA01) (Note HA02) Min 0.55 0.58 62 47.5 4 (Note HA04) 14 24 34 (Note HA05) (Note HA06) (Note HA07) 0.7 9.5 9.5 2.9 2.4 2.0 4.7 0 (Note HA08) 1.9 4.7 3.2 2.2 4.7 4.3 4.3 2.2 1.5 (Note HA09) 1.5 2.2 6.0 6.0 2.2 (Note HA10) Monitor pin 21 = VCC Monitor pin 26 = VCC 2.5 3.9 5.3 Typ. 0.65 0.68 0.5 67 99.5 52.5 8.5 20 30 40 0.8 10.5 10.5 3.4 3.1 2.5 5.0 0.7 2.4 5.0 4.2 2.7 5.0 6.3 6.3 2.5 3.5 3.5 2.5 8.5 8.5 2.5 3.0 4.2 5.6 Max 0.75 0.78 2.0 72 98 57.5 14 26 36 46 0.9 11.5 11.5 3.9 3.8 3.0 5.3 1.5 2.9 5.3 5.2 3.2 5.3 8.9 8.9 2.8 5.9 5.9 2.8 11.5 11.5 2.8 3.5 4.5 5.9 V % % % V V V V % V % V % V % % % Vp-p % % % Unit s s

2000-07-20
49/113
TA1316AN
Parameter Symbol TH00A TH01A H-OUT pulse duty TH10A TH00B TH01B TH10B F00 Horizontal free-running frequency F01 F10 F11 F00MIN F00MAX F01MIN Horizontal oscillation frequency variable range F01MAX F10MIN F10MAX F11MIN F11MAX BH00 Horizontal oscillation control sensitivity BH01 BH10 BH11 H-OUT output voltage V15H V15L V18L Horizontal oscillation frequency pin (pin 18) control voltage threshold V18M V18H DAC switching voltage VP output pulse width 000 001 010 Vertical free-running (maximum pull-in range) 011 100 101 110 Vertical minimum pull-in range DAC2 VDAC2H VDAC2L VPW VPt0 VPt1 VPt2 VPt3 VPt4 VPt5 VPt6 TVPULL Test Circuit Test Condition Min 39 38 (Note HB01) 38 45 44.5 45 15.59 (Note HB02) 31.19 33.41 44.52 14.48 16.37 28.97 (Note HB03) 32.72 30.91 34.91 43.20 47.85 176 Hz/0.1 V (Note HB04) 352 376 520 (Note HB05) 4.8 1.3 4.3 7.3 TEST = (00), DAC2 = (1) TEST = (00), DAC2 = (0) 8.5 4 1278 846 (Note V01) 722 657 610 360 304 (Note V02) 47 Typ. 41 40 40 47 46.5 47 15.75 31.5 33.75 45.0 14.78 16.70 29.56 33.39 31.54 35.62 44.00 48.65 220 440 470 650 5.1 0.1 1.5 4.5 7.5 9.0 0.3 4.5 1281 849 725 660 613 363 307 48 Max 43 42 42 49 48.5 49 15.91 31.82 34.09 45.48 15.08 17.03 30.15 34.06 32.17 36.33 44.80 49.45 264 528 564 780 5.2 0.3 1.7 4.7 7.7 0.7 5 1284 852 728 663 616 366 310 49 H H H V V kHz kHz % Unit

2000-07-20
50/113
TA1316AN
Parameter 000 Symbol VBPP0E VBPP0S 001 VBPP1E VBPP1S 010 Vertical black peak detection pulse VBPP2E VBPP2S 011 VBPP3E VBPP3S 100 VBPP4E VBPP4S 101 VBPP5E VBPP5S 110 VBPP6E VBPP6S Vertical blanking stop phase High Low VBLKMIN VBLKMAX VP output voltage V22VBLKH V22VBLKL 15.75 kHz Delay time from SYNC input to VP output 31.5 kHz 33.75 kHz 45 kHz Test Circuit Test Condition Min 51 Typ. 52 Max 53 Unit

Pin 27 voltage (Note V04) (Note V03)
1099.5 1100.5 1101.5 51 729.5 49.5 599.5 49.5 544.5 51 499.5 51 289.5 51 239.5 15 45 4.6 10.0 4.8 4.4 3.1 52 730.5 50.5 600.5 50.5 545.5 52 500.5 52 290.5 52 240.5 16 46 5.0 0.1 11.6 5.8 5.4 4.1 53 731.5 51.5 601.5 51.5 546.5 53 501.5 53 291.5 53 241.5 17 H 47 5.4 0.5 13.4 7.6 7.2 5.9 s V H
2000-07-20
51/113
TA1316AN
Parameter 000 Symbol CBLK1000min CBLK1000max 001 CBLK1001min CBLK1001max 010 Compression BLK1 (start phase) 011 CBLK1010min CBLK1010max CBLK1011min CBLK1011max 100 CBLK1100min CBLK1100max 101 CBLK1101min CBLK1101max 110 CBLK1110min CBLK1110max 000 CBLK2000min CBLK2000max 001 CBLK2001min CBLK2001max 010 Compression BLK2 (stop phase) 011 CBLK2010min CBLK2010max CBLK2011min CBLK2011max 100 CBLK2100min CBLK2100max 101 CBLK2101min CBLK2101max 110 External vertical blanking insert current CBLK2110min CBLK2110max Test Circuit Test Condition Min 1087 1117 719 749 591 621 527 557 487 517 279 309 223 253 49 77 49 77 49 77 49 77 49 77 49 77 49 77 Pin 27, current 400 Typ. 1088 1118 720 750 592 622 528 558 488 518 280 310 224 254 50 78 50 78 50 78 50 78 50 78 50 78 50 78 450 Max 1089 1119 721 751 593 623 529 559 489 519 281 311 225 255 51 79 51 79 51 79 51 79 51 79 51 79 51 79 550 A H H Unit

2000-07-20
52/113
TA1316AN
Test Conditions for Luminance
Common Test Conditions for Luminance
(1) (2) (3) (4) SW4 = SW5 = B, SW7 = OPEN, SW8~SW10 = B, SW20 = ON, SW23 = B, SW33SW39 = A, SW54 = 54 = ON After sending bus control data with preset values, set ACB MODE to off (00) and SYNC INPUT-SW to sync input (10). Input sync signal [signal in sync with input signal used for testing, except for sweep signal] to pin 14 (SYNC IN). Set horizontal frequency to that of pin 14. Set pin 7 to open, Y/color difference signal input mode (YUV INPUT MODE) to Through (10), SYNC SEP-LEVEL to 20% (01) and vertical free-running frequency to 307H (110).
Test Conditions Note No. Parameter SW1 P01 Black detection level shift B SW mode SW2 C SW3 C SW56 OPEN (1) Connect external power supply (PS) to pin 3 and monitor pins 2 and 56. (2) Set black stretch point 1 to off (000) and black detection level (BDL) to 0 IRE (1). (3) Increase PS voltage from 4.95 V in 1-mV steps. When pin 2 picture period (High) goes Low, measure pin 56 DC differential VB. (4) Set black detection level (BDL) to 3 IRE (0). (5) Repeat step (3) above and measure pin 56 DC differential VB3. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Pin 56 waveform VB, VB3
Pin 2 waveform
P02
Black stretch amplifier maximum gain
B
A
A
OPEN (1) Set SW2 to A (maximum gain) and input 500-kHz sine wave to TPA. (2) Adjust signal amplitude to 0.1 Vp-p using pin 3. (3) Set black stretch point 1 to off (000) and measure pin 56 amplitude VA. (4) Set black stretch point 1 to 001 (black stretch on) and measure pin 56 amplitude VB. (5) Calculate GBS using the following formula. GBS = 20 x log (VB / VA) [dB]
2000-07-20
53/113
TA1316AN
Test Conditions Note No. Parameter SW1 P03 Black stretch start point 1 B SW mode SW2 A SW3 C SW56 OPEN (1) Set SW2 to A (maximum gain) and black stretch start point 1 to off (000). (2) Connect external power supply (PS) to pin 3, increase voltage from V3, and plot resulting pin 56 voltage change S1. Define pin 56 voltages when V3 and V3 + 0.7 V are applied as V0 and V100. (3) Set black stretch start point 1 to 001 (minimum), increase PS voltage from V3 as in (2) above and plot resulting pin 56 voltage change S2. (4) Set black stretch start point 1 to maximum (111), repeat step (2) above and plot resulting pin 56 voltage change S3. (5) Determine S1 and S2 intersection VBST1 and S1 and S3 intersection VBST2 using the graph below. Calculate PBST1 and PBST2 using the following formulae. VZ [V] = V100 [V] - V0 [V] PBST1 [(IRE)] = [(VBST1 [V] - V56 [V]) / VZ] x 100 (IRE) PBST2 [(IRE)] = [(VBST2 [V] - V56 [V]) / VZ] x 100 (IRE) Pin 56 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
S3 VBST2
S1
VBST1 S2
V56 Pin 3
2000-07-20
54/113
TA1316AN
Test Conditions Note No. Parameter SW1 P04 Black stretch start point 2 B SW mode SW2 A SW3 A SW56 ON (1) Set black stretch start point 1 to off (000), picture mute to off (P-MODE: Normal1 (000)) and apply 0 V to #1. Input TG7 linearity to TPA, adjust amplitude using pin 3 as shown below, set UNI-COLOR to center (1000000), then measure pin 43 (R OUT) amplitude VP43. (2) Set black stretch start point 1 to 001 (black stretch on), connect external power supply (PS) to pin 56 and monitor pin 43 (R OUT). (3) When black stretch start point 2 data is a minimum (00), determine black stretch start point differential V00 for PS = V56 (APL = 0%) and for PS = V56 + 1.0 V (APL = 100%), as shown below. (Using oscilloscope, adjust input waveform so that amplitude (gradient) is same as that of output waveform in VAR. Compare waveforms and determine point where output waveform bends.) (4) When black stretch start point 2 data is a maximum (11), determine black stretch start point differential V11 as in (3) above. (5) Calculate using the following formulae. PBS1 = (V00/VP43) x 100 PBS2 = (V11/VP43) x 100 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
LINEARITY
APL 100% 0.7 Vp-p APL 0%
V***
0.3 Vp-p Pin 3 waveform (linear) Pin 43 (R OUT)
2000-07-20
55/113
TA1316AN
Test Conditions Note No. Parameter SW1 P05 Dynamic ABL detection voltage B SW mode SW2 A SW3 C SW56 OPEN (1) Set ABL GAIN to minimum (000), DYNAMIC ABL GAIN to maximum (111) and black stretch point 1 to off (000). (2) Connect external power supply (PS) to pin 53 and decrease voltage from 6.5 V. (3) When DYNAMIC ABL POINT bus data is 000, 001, 110 and 100, repeat step (2) above. When pin 56 picture period goes Low, measure PS voltages V000, V001, V010 and V100. (4) Determine voltage differential between V000 and V001 (V001), between V000 and V010 (V010), and between V000 and V100 (V100). DV*** = V000 - V001 (V010, V100) Pin 56 undetected Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Pin 56 detected
Pin 2 waveform
2000-07-20
56/113
TA1316AN
Test Conditions Note No. Parameter SW1 P06 Dynamic ABL sensitivity B SW mode SW2 A SW3 C SW56 ON (1) Set black stretch point 1 to off (000) and connect external power supply (PS) to pin 53. (2) When DYNAMIC ABL POINT is a minimum (000) and DYNAMIC ABL GAIN is a minimum (000) or a maximum (111), plot pin 53 voltage characteristic in relation to pin 56 voltage. (3) Determine gradients SDAMIN and SDAMAX using the graph below. SDAMIN = Y/X SDAMAX = Y/X Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Pin 56
10%
100%
Y
10%
X
Pin 53
2000-07-20
57/113
TA1316AN
Test Conditions Note No. Parameter SW1 P07 Black level correction B SW mode SW2 A SW3 C SW56 OPEN (1) Set black stretch point 1 to off (000) and monitor pin 56. (2) Set black level correction (BLC) to on (1), measure V1 (mV) and calculate BLC using the following formula. (VZ: P09 value) BLC = [V1/(VZ x 10 )] x 100 (IRE)
3
Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Picture period
V1 [mV]
2000-07-20
58/113
TA1316AN
Test Conditions Note No. Parameter SW1 P08 Dynamic Y correction point A SW mode SW2 B SW3 A SW56 OPEN (1) Connect external power supply (PS1) to pin 3 and (PS2) to TP1. Set PS2 to 0 V. (2) Set dynamic Y point switch (DYNC-POINT) to 19 IRE (00), dynamic Y gain VS dark area (DYNC GAIN VS DARK AREA) to off (000) and dynamic Y dark area gain to off (00). (3) When PS1 is increased from V3 to V3 + 0.7 V, set V3 to 0 V and plot voltage change in pin 56. (V3 is pin voltage of pin 3.) (4) Set DYNC GAIN VS DARK AREA to maximum (111), static Y dark area gain (STATIC-GAIN) to maximum (11) and PS2 to 1 V. (5) As in step (3) above, increase PS1 from V3 to V3 + 0.7 V and plot pin 56 voltage change. (6) Set DYNC-POINT to 21 IRE (01), 25 IRE (10) and 30 IRE (11), increase PS1 from V3 to V3 + 0.7 V and plot pin 56 voltage change. (7) Determine dynamic Y point when DYNC-POINT is set to 19 IRE (00) as VDGP00 using the graph below. Also determine dynamic Y point when DYNC-POINT is set to 21 IRE (01) as VDGP01; to 25 IRE (10) as VDGP10; to 30 IRE (10) as VDGP11. (8) Using VDGP01, VDGP10, and VDGP11 thus determined, calculate PDGP00, PDGP01, PDGP10 and PDGP11 using the following formulae. PDGP00 = (VDGP00/0.7) x 100 PDGP01 = (VDGP01/0.7) x 100 PDGP10 = (VDGP10/0.7) x 100 PDGP11 = (VDGP11/0.7) x 100 Pin 56 voltage [V] PDGPA = PDGP01 - PDGP00 PDGPB = PDGP10 - PDGP00 PDGPC = PDGP11 - PDGP00 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
ON OFF
VDGP***
100 IRE
Pin 3 voltage
2000-07-20
59/113
TA1316AN
Test Conditions Note No. Parameter SW1 P09 Dynamic Y gain A SW mode SW2 B SW3 A SW56 OPEN (1) Connect external power supply (PS1) to pin 3 and (PS2) to TP1. Set PS2 to 0 V. (2) Set DYNC-POINT to 30 IRE (11), DYNC GAIN VS DARK AREA to off (000) and STATIC-GAIN to off (00). (3) Set PS1 to V3 and determine pin 56 voltage VDGOFF1. (4) Set PS1 to V3 + 0.16 V and determine pin 56 voltage VDGOFF2. (5) Set DYNC GAIN VS DARK AREA to maximum (111), PS2 to 1 V and determine pin 56 voltage VGDON. (6) Calculate GDG using the following formula. GDG = 20 x log (VDGON - VDGOFF1/VDGOFF2 - VDGOFF1) P10 Static Y dark area gain A B A OPEN (1) Connect external power supply (PS1) to pin 3 and (PS2) to TP1. Set PS2 to 0 V. (2) Set DYNC-POINT to 30 IRE (11), DYNC GAIN VS DARK AREA to off (000) and STATIC-GAIN to off (00). (3) Set PS1 to V3 and determine pin 56 voltage VSGOFF1. (4) Set PS1 to V3 + 0.16 V and determine pin 56 voltage VSGOFF2. (5) Set STATIC GAIN to maximum (11) and determine pin 56 voltage VSGON. (6) Calculate GSG using the following formula. GSG = 20 x log (VSGON - VSGOFF1/VSGOFF2 - VSGOFF1) Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
60/113
TA1316AN
Test Conditions Note No. Parameter SW1 P11 DC restoration gain B SW mode SW2 B SW3 C SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), DC restoration start point to minimum (000) and DC restoration limit point (DC REST LIMIT) to 100% (11) and connect external power supply PS1 to pin 3. (2) Measure DC level of pin 43 picture period. When use PS1 at V3 as reference, Set PS1 to V3 + 0.7 V and adjust DC level to 0.7 V using UNI-COLOR. (3) Set DC REST RATE to minimum (000) and measure VDT1 and VDT2 when pin 3 is at V3 and at V3 + 0.1 V (see figure below). (4) Measure VDT3 when pin 3 is at V3 + 0.1 V. Set DC REST RATE to maximum (111) and measure VDT3. (5) Set DC restoration rate switch (DCRR-SW) to 100% or less (1) and pin 3 to V3 + 0.1 V, and measure VDT4. Set DC REST RATE to maximum (111) and measure VDT4. (6) Calculate ADT100, ADT135 and ADT65 using the following formulae. ADT100 = (VDT2 [V] - VDT1 [V]) / 0.1 [V] ADT135 = (VDT3 [V] - VDT1 [V]) / 0.1 [V] ADT65 = 1 - {(VDT2 [V] - VDT4 [V]) / 0.1 [V]} Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
V3 [V]
Picture period
VDT1
V3 + 0.1 V
Pin 43 waveform
VDT2 VDT4
VDT3
2000-07-20
61/113
TA1316AN
Test Conditions Note No. Parameter SW1 P12 DC restoration start point B SW mode SW2 B SW3 C SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), DC restoration start point to minimum (000) and DC REST LIMIT to 100% (11), and connect external power supply PS1 to pin 3. (2) Measure DC level of pin 43 picture period. Use PS1 at V3 as reference. When PS1 is set to V3 + 0.7 V, adjust DC level to +1.0 V using UNI-COLOR. (3) Set DC REST RATE to minimum (000), increase PS1 from V3 and plot voltage relationship between pin 56 (DC voltage) and pin 43 (picture period voltage). (4) Set DC REST RATE to maximum (111), increase PS1 from V3 and plot voltage relationship between pins 56 and 43. (5) Set DC REST RATE to maximum (111), DC restoration start point to maximum (111), increase PS1 from V3 and plot voltage relationship between pins 56 and 43. (6) Calculate VDT0 and VDT1 using the following formulae. VDT0 = [(VSP0 - V56)/1 V] x 100% VDT1 = [(VSP1 - V56)/1 V] x 100% Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Pin 43
DC restoration start point: 000
DC restoration start point: 111
DC restoration rate: 000
VSP0 VSP1
VPC
Pin 56
2000-07-20
62/113
TA1316AN
Test Conditions Note No. Parameter SW1 P13 DC restoration limit point B SW mode SW2 B SW3 C SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111) and DC restoration start point to minimum (000), and connect external power supply PS to pin 56. (2) Set DC REST RATE to maximum (111). (3) Increase PS from 5 V, monitor pin 43 and plot DC restoration. (4) Change DC REST LIMIT and repeat step (3) above. Determine VL11, VL10, VL01 and VL00 using the graph below. Calculate PDTL11, PDTL10, PDTL01 and PDTL00 using the following formulae. PDTL11 = [(VL11 - V56)/1.0] x 100% PDTL10 = [(VL10 - V56)/1.0] x 100% PDTL01 = [(VL01 - V56)/1.0] x 100% PDTL00 = [(VL00 - V56)/1.0] x 100% Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Pin 43 100% (00)
87% (01)
73% (10)
60% (11)
VL11 VL10
VL00 VL01
Pin 56
2000-07-20
63/113
TA1316AN
Test Conditions Note No. Parameter SW1 P14 Sharpness control range B SW mode SW2 B SW3 A SW56 ON (1) Input sine wave (frequency variable) to TPA. (2) Set pin 3 amplitude to 20 mVP-P. (3) Set UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), APACON peak frequency (APACON PEAK f0) to 15 M (00) and color detail enhancer (CDE) to center (10). (4) Set picture mute to off (P-MODE: Normal1 (000)) and monitor pin 43. (5) Set picture sharpness (PICTURE-SHARPNESS) to center (1000000) and measure amplitude V100 when input frequency is 100 kHz. (6) Set PICTURE-SHARPNESS to maximum (1111111) and measure amplitude VMAX00 when input frequency is FAP00. Calculate GMAX00 using the following formula. (7) Set PICTURE-SHARPNESS to minimum (0000000) and measure amplitude VMIN00 when input frequency is FAP00. Calculate GMIN00 using the following formula. (8) Set APACON PEAK f0 to 8.8 M (01) and measure amplitudes VMAX01 and VMIN01 as in steps (6) and (7) when input frequency is FAP01. Calculate GMAX01 and GMIN01 using the following formulae. (9) Set APACON PEAK f0 to 7.5 M (10) and measure amplitudes VMAX10 and VMIN10 as in steps (6) and (7) when input frequency is FAP10. Calculate GMAX10 and GMIN10 using the following formulae. (10) Set APACON PEAK f0 to 5 M (11) and measure amplitudes VMAX11 and VMIN11 as in steps (6) and (7) when input frequency is FAP11. Calculate GMAX11 and GMIN11 using the following formulae. GMAX*** = 20 x log (VMAX*** / V100) GMIN*** = 20 x log (VMIN*** / V100) [dB] [dB] Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
*:
When using a spectrum analyzer for monitoring, measure gain for low frequency.
2000-07-20
64/113
TA1316AN
Test Conditions Note No. Parameter SW1 P15 Sharpness control center characteristic B SW mode SW2 B SW3 A SW56 ON (1) Input sine wave (frequency variable) to TPA. (2) Set pin 3 amplitude to 20 mVP-P. (3) Set UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), APACON peak frequency (APACON PEAK f0) to 15 M (00) and color detail enhancer (CDE) to center (10). (4) Set picture mute to off (P-MODE: Normal1 (000)) and monitor pin 43. (5) Set PICTURE-SHARPNESS to center (1000000) and measure amplitude V100 when input frequency is 100 kHz. (6) Measure pin 43 amplitude VCEN00 when input frequency is FAP00 with PICTURE-SHARPNESS set to center (1000000). Calculate GCEN00 using the following formula. (7) Set APACON PEAK f0 to 8.8 M (01) and measure amplitude VCEN01 as in step (6) when input frequency is FAP01. Calculate GCEN01 using the following formula. (8) Set APACON PEAK f0 to 7.5 M (10) and measure amplitude VCEN10 as in step (6) when input frequency is FAP10. Calculate GCEN10 using the following formula. (9) Set APACON PEAK f0 to 5 M (11) and measure amplitudes VCEN11 as in step (6) when input frequency is FAP11. Calculate GCEN11 using the following formula. GCEN*** = 20 x log (VCEN*** / V100) [dB] Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
*:
When using a spectrum analyzer for monitoring, measure gain for low frequency.
2000-07-20
65/113
TA1316AN
Test Conditions Note No. Parameter SW1 P16 YNR characteristic B SW mode SW2 B SW3 A SW56 ON (1) Input sine wave (frequency variable) to TPA. (2) Set pin 3 amplitude to 20 mVP-P. (3) Set UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), APACON peak frequency (APACON PEAK f0) to 15 M (00) and color detail enhancer (CDE) to center (10). (4) Set picture mute to off (P-MODE: Normal1 (000)) and monitor pin 43. (5) Set PICTURE-SHARPNESS to center (1000000) and measure amplitude V100 when input frequency is 100 kHz. (6) Set YNR to on (1) and PICTURE-SHARPNESS to minimum (0000000). Measure pin 43 amplitude VTRAP00 when input frequency is FAP00 and calculate GYNRT00 using the following formula. (7) When PICTURE-SHARPNESS is set to 0000011 and measure pin 43 amplitude VFLAT00. Calculate GYNRF00 using the following formula. (8) Set APACON PEAK f0 to 8.8 M (01) and measure amplitude VTRAP01 as in step (7) when input frequency is FAP01. Calculate GTRAP01 using the following formula. (9) Set APACON PEAK f0 to 7.5 M (10) and measure amplitude VTRAP10 as in step (7) when input frequency is FAP10. Calculate GTRAP10 using the following formula. (10) Set APACON PEAK f0 to 5 M (11) and measure amplitude VTRAP11 as in step (7) when input frequency is FAP11. Calculate GTRAP11 using the following formula. GYNRT** = 20 x log (VTRAP**/V100) GYNRF** = 20 x log (VFLAT**/V100) [dB] [dB] Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
*:
When using a spectrum analyzer for monitoring, measure gain for low frequency.
2000-07-20
66/113
TA1316AN
Test Conditions Note No. Parameter SW1 P17 Control of SRT response to 2T pulse input B SW mode SW2 B SW3 A SW56 ON (1) Input 2T pulse (0.7 VP-P) signal to TPA and set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), and SHR-TRACKING to SRT-GAIN minimum (11), CDE to center (10) and PICTURE-SHARPNESS to center (1000000). (2) Set APACON frequency to 15 M (00) and monitor pin 43. (3) Measure TSRTMIN00 and VSRTMIN00 as shown in the figure below. (4) Set SHR-TRACKING to SRT-GAIN maximum (00) and measure TSRTMAX00 and VSRTMAX00. (5) Set APACON frequency to 8.8 M (01), SHR-TRACKING to SRT-GAIN minimum (11) and maximum (00) as in step (4) above, and measure TSRTMIN01, VSRTMIN01, TSRTMAX01 and VSRTMAX01. (6) Set APACON frequency to 7.5 M (10), SHR-TRACKING to SRT-GAIN minimum (11) and maximum (00) as in step (4) above, and measure TSRTMIN10, VSRTMIN10, TSRTMAX10 and VSRTMAX10. (7) Set APACON frequency to 5 M (11), SHR-TRACKING to SRT-GAIN minimum (11) and maximum (00) as in step (4) above, and measure TSRTMIN11, VSRTMIN11, TSRTMAX11 and VSRTMAX11. (8) Calculate using the following formulae. TSRT00 = 20 x log [((VSRTMAX00/TSRTMAX00)/(VSRTMIN00/TSRTMIN00)] TSRT01 = 20 x log [(VSRTMAX01/TSRTMAX01)/(VSRTMIN01/TSRTMIN01)] TSRT10 = 20 x log [(VSRTMAX10/TSRTMAX10)/(VSRTMIN10/TSRTMIN10)] TSRT11 = 20 x log [(VSRTMAX11/TSRTMAX11)/(VSRTMIN11/TSRTMIN11)] Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
T***
20%
V***
100%
20%
2000-07-20
67/113
TA1316AN
Test Conditions Note No. Parameter SW1 P18 VSM gain B SW mode SW2 B SW3 A SW56 ON (1) Input sine wave of frequency FVSM2 to TPA. (2) Set picture mute to off (P-MODE: Normal1 (000)), and pin 3 amplitude to 0.02 VP-P. (3) Vary VSM GAIN from off (000) to maximum (111) and measure pin 54 amplitudes V001, V010, V011, V100, V101, V110 and V111. Set input amplitude to 0.7 VP-P and measure pin 54 amplitude V000 when VSM GAIN is OFF (000). (4) Calculate using the following formulae. GV000 = 20 x log (V000/0.7) GV001 = 20 x log (V001/0.02) GV010 = 20 x log (V010/0.02) GV011 = 20 x log (V011/0.02) GV100 = 20 x log (V100/0.02) GV101 = 20 x log (V101/0.02) GV110 = 20 x log (V110/0.02) GV111 = 20 x log (V111/0.02) [dB] [dB] [dB] [dB] [dB] [dB] [dB] [dB] Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
68/113
TA1316AN
Test Conditions Note No. Parameter SW1 P19 Response time for VSM fast muting B SW mode SW2 B SW3 A SW56 ON (1) Input sine wave of frequency FVSM to TPA. (2) Set picture mute to off (P-MODE: Normal1 (000)), VSM GAIN to 100 and pin 3 amplitude to 0.1 VP-P. Monitor pin 54. (3) Input pulse as shown below to pin 49 and determine response times TVM49A and TVM49B. (4) Likewise input pulse to pin 50 and determine response times TVM50A and TVM50B. (5) Likewise input pulse to pin 51 and determine response times TVM51A and TVM51B. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Square wave (50 kHz, 2 VP-P) 2V
VSR49 [V] Pin 49 waveform 0V TVM49A TVM49B
Pin 54 waveform
Mute period
2000-07-20
69/113
TA1316AN
Test Conditions Note No. Parameter SW1 P20 VSM limit B SW mode SW2 B SW3 A SW56 ON (1) Input sine wave of frequency FVSM2 to TPA. (2) Set picture mute to off (P-MODE: Normal1 (000)), VSM GAIN to 111 and pin 3 amplitude to 0.7 VP-P. (3) Measure pin 54 amplitudes VLU and VLD [VP-P] as shown below. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
VLU
VLD
2000-07-20
70/113
TA1316AN
Test Conditions Note No. Parameter SW1 P21 Delay time from Y input to R output B SW mode SW2 B SW3 A SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11) and input 2T pulse signal (STD) to TPA. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(2) Set PICTURE-SHARPNESS to center (1000000). (3) Determine TYR by monitioring pins 43 and 3 as shown below.
2T pulse (STD)
Pin 3 50%
50%
Pin 43
TYR
2000-07-20
71/113
TA1316AN
Test Conditions Note No. Parameter SW1 P22 Y delay time change B SW mode SW2 B SW3 A SW56 ON (1) Set picture mute to off (P-MODE: Normal1, 000), UNI-COLOR to maximum (1111111) and SHR-TRACKING to SRT-GAIN minimum (11), and input T2 pulse signal (approx. 0.7 Vp-p) to TPA. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(2) Set picture sharpness to center (1000000). (3) Monitor pin 3 and pin 43, and determine the time difference YDL00 for each signal at the 50% point as shown below. (4) Set Y/C-DL1 to +5 ns (1) and determine YDL01. (5) Set Y/C-DL1 to +0 ns (0) and Y/C-DL2 to +10 ns (1), and determine YDL10. (6) Set Y/C-DL1 to +5 ns (1) and Y/C-DL2 to +10 ns (1), and determine YDL11. (7) Determine YDLA, YDLB and YDLC as follows: YDLA = YDL01 - YDL00 YDLB = YDL10 - YDL00 YDLC = YDL11 - YDL00 T2 pulse signal approx. 0.7 Vp-p
#43 #3 50%
50%
YDL00 YDL01 YDL10 YDL11
2000-07-20
72/113
TA1316AN
Test Conditions Note No. Parameter SW1 P23 Transfer distortion correction B SW mode SW2 B SW3 A SW56 ON (1) Input multi-burst signal (frequency equivalent to 4.2 MHz) of signal A to TPA. Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11) and CDE to minimum (00). (2) Set PICTURE-SHARPNESS to flat (near DEC[24]), APACON PEAK f0 to 5 M (11) and monitor pin 43. (3) Input sine wave signal A (approx. 4.2 MHz) becomes signal B on pin 43 as shown at right. Determine SA and SB. (4) When Y-GROUP DELAY CORRECTION is set to minimum (0000), signal A becomes signal C on pin 43. Determine SAMIN and SBMIN. (5) When Y-GROUP DELAY CORRECTION is set to maximum (1111), signal A becomes signal D on pin 43. Determine SAMAX and SBMAX. GAMIN = 20 x log (SAMIN/SA) GBMIN = 20 x log (SBMIN/SB) GAMAX = 20 x log (SAMAX/SA) GBMAX = 20 x log (SBMAX/SB) Signal B SB Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Signal A
SA
Signal (6) Calculate using the following formulae. C [dB] [dB] [dB] [dB]
SAMIN
SBMIN
SAMAX Signal D
SAMAX
Note: The input sine wave starts and ends within the picture period. It is like a burst signal, not a continuous wave.
2000-07-20
73/113
TA1316AN
Test Conditions Note No. Parameter SW1 P24 Color detail enhancer B SW mode SW2 B SW3 A SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), COLOR to center (1000000), color limiter level (CLT) to 2 Vp (1) and C-SRT-FREQ to 4.5 M (10). Input SWEEP signal to TPA and set pin 3 amplitude to 20 mVP-P. Set SW4 to A. Input signal (pin 4 amplitude: 0.2 VP-P) to TP4 as shown in the figure below. (2) Set PICTURE-SHARPNESS to center (1000000) and Y DETAIL CONTROL to center (10000), and monitor pin 41 using a spectrum analyzer. (3) Set low-frequency area to 0dB when CDE is set to minimum (00) and measure peak level GCDEMIN. (4) Set low-frequency area to 0dB when CDE is set to maximum (11) and measure peak level GCDEMAX. (5) Calculate using the following formula. GCDE00 = GCDEMAX00 - GCDEMIN00 (6) Set APACON PEAK f0 to 15 M (00), 8.8 M (01), 7.5 M (10) and 5 M (11), and measure peak levels GCDE00, GCDE01, GCDE10 and GCDE11. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Output gain [dB]
max 0.2 Vp-p min 0 dB BLK period Picture period
Input frequency [MHz]
2000-07-20
74/113
TA1316AN
Test Conditions Note No. Parameter SW1 P25 Y detail control range B SW mode SW2 B SW3 A SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11) and CDE to center (10). Input SWEEP signal to TPA. (2) Set pin 3 amplitude to 20 mVP-P. (3) Set PICTURE-SHARPNESS to minimum (0000000) and Y DETAIL CONTROL to maximum (11111), and monitor pin 43 using a spectrum analyzer. (4) Set low-frequency area to 0dB. Set APACON PEAK f0 to 15 M (00), 8.8 M (01), 7.5 M (10) and 5 M (11), and measure peak levels GYDMAX00, GYDMAX01, GYNMAX10 and GYDMAX11. (5) Set Y DETAIL CONTROL to center (10000) and measure peak levels GYDCEN00, GYDCEN01, GYDCEN10 and GYDCEN11. (6) Set Y DETAIL CONTROL to minimum (00000) and measure peak levels GYDMIN00, GYDMIN01, GYNDIN10 and GYDMIN11. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
75/113
TA1316AN
Test Conditions Note No. Parameter SW1 P26 APACON white peak limiter B SW mode SW2 B SW3 A SW56 ON (1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to 1101000, SHR-TRACKING to SRT-GAIN maximum (00) and CDE to maximum (11). Input T pulse signal (0.7 VP-P) to TPA. (2) Set PICTURE-SHARPNESS to maximum (111111) and APACON PEAK f0 to 5 M (11), and monitor pin 43. (3) When APACON white peak limiter is off (000), measure positive spike amplitude VWPLOFF1. (4) When APACON white peak limiter is at maximum (111), measure positive spike amplitude VWPLMAX1. (5) Set UNI-COLOR to center (1000000). When APACON white peak limiter is off (000) and at maximum (111), measure positive spike amplitudes VWPLOFF2 and VWPLMAX2. (6) Set UNI-COLOR to minimum (0000000). When APACON white peak limiter is off (000) and at maximum (111), measure positive spike amplitudes VWPLOFF3 and VWPLMAX3. (7) Calculate using the following formulae. GWPL1 = 20 x log (VWPLMAX1/VWPLOFF1) GWPL2 = 20 x log (VWPLMAX2/VWPLOFF2) GWPL3 = 20 x log (VWPLMAX3/VWPLOFF3) [dB] [dB] [dB] Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
VWPLMAX
VWPLOFF
2000-07-20
76/113
TA1316AN
Test Conditions for Color Difference Signal 1/YUV Input and Matrix
Common Test Conditions for Color Difference Signal 1/YUV Input and Matrix
(1) (2) (3) (4) SW1 = B, SW2 = B, SW20 = ON, SW33SW39 = A, SW54 = OPEN, SW56 = OPEN Send BUS control data with preset values. Set ACB MODE to off (0) and high bright color (HI BRT) to off (0). Input sync signal [signal in sync with input signal for testing, except for SWEEP signal] to pin 14 (SYNC IN) and set SYNC-INPUT to (10).
Test Conditions Note No. Parameter SW3 S01 Color SRT gain C SW8 B SW mode SW4 A SW9 B SW5 A SW10 B SW7 OPEN (1) Set Y mute to on (P-MODE: Y-MUTE (001)), YUV INPUT MODE to Through (10), BRIGHTNESS to center (10000000), COLOR to center (1000000) and UNI-COLOR to maximum (1111111). (2) Input 2T pulse signal to TP4 and set pin 4 amplitude to 350 mVP-P. (3) Monitor pin 41 output waveform. When C-SRT-FREQ is 5 MHz (00), measure edge gradients SB00MIN, SB00CEN and SB00MAX when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111) as in shown in the figure below. Set SB00MIN to 0 dB, determine GSB00CEN = 20 x log (SB00CEN/SB00MIN) and GSB00MAX = 20 x log (SB00MAX/SB00MIN). (4) Repeat step (3) above, setting C-SRT-FREQ to 6.7 MHz (01) and 10 MHz (10), and measure edge gradients when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111). Determine GSB01CEN, GSB10CEN, GSB01MAX and GSB10MAX. (5) Input 2T pulse signal to TP5 and set pin 5 amplitude to 350 mVP-P. (6) Monitor pin 43 output waveform. When C-SRT-FREQ is 5 MHz (00), measure edge gradients SR00MIN, SR00CEN and SR00MAX when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111) as shown in the figure below. Set SR00MIN to 0dB, determine GSR00CEN = 20 x log (SR00CEN/SR00MIN) and GSR00MAX = 20 x log (SR00MAX/SR00MIN). (7) Repeat step (3) above, setting C-SRT-FREQ to 6.7 MHz (01) and 10 MHz (10), and measure edge gradients when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111). Determine GSR01CEN, GSR10CEN, GSR01MAX and GSR10MAX. T*** Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Gradient 10%
S*** = V***/T***
V***
100%
10%
2000-07-20
77/113
TA1316AN
Test Conditions Note No. Parameter SW3 S02 Color difference signal amplitude correction C SW8 B SW mode SW4 A SW9 B SW5 A SW10 B SW7 OPEN (1) Input 100-kHz sine wave to TP4 and set pin 4 amplitude to 0.2 VP-P. SW56 (2) Set Y mute to OFF (P-MODE: Normal1 (000)), YUV INPUT MODE to Through (10), BRIGHTNESS to center (10000000), COLOR to center (1000000), UNI-COLOR to maximum (1111111), Y/C GAIN COMP1 to OPEN minimum (00), Y/C GAIN COMP2 to minimum (00), black stretch point 1 to off (000), dynamic Y point to 30 IRE (11) and SW1 to A. Apply 0 V to TP1 using external power supply PS1 and 5.16 V to pin 3 using PS2. (3) Monitor pin 41 output waveform and measure amplitude VBDY0. (4) Set Y/C GAIN COMP1 to maximum (11) and measure pin 41 amplitude VBDY1. (5) Set DYNC GAIN VS DARK AREA to maximum (111), STATIC-GAIN to maximum (11) and external power supply PS1 to 1 V, and measure pin 41 amplitude VBDY2. (6) Set Y/C GAIN COMP2 to maximum (11) and measure pin 41 amplitude VBDY3. (7) Set Y/C GAIN COMP1 to minimum (00), Y/C GAIN COMP2 to minimum (00), DYNC GAIN VS DARK AREA to minimum (000), STATIC-GAIN to minimum (00), PS1 to 0 V, PS2 to 5 V and SW2 to A. Measure pin 41 amplitude VBBS0. (8) Set Y/C GAIN COMP1 to maximum (11) and measure pin 41 amplitude VBBS1. (9) Set black stretch point 1 to maximum (111) and measure pin 41 amplitude VBBS2. (10) Set Y/C GAIN COMP2 to maximum (11) and measure pin 41 amplitude VBBS3. (11) Calculate using the following formulae. GCBDY1 = 20 x log (VBDY1/VBDY0) GCBDY3 = 20 x log (VBDY3/VBDY0) GCBBS2 = 20 x log (VBBS2/VBBS0) GCBDY2 = 20 x log (VBDY2/VBDY0) GCBBS1 = 20 x log (VBBS1/VBBS0) GCBBS3 = 20 x log (VBBS3/VBBS0) Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(12) Input 100-kHz sine wave to TP5, set pin 5 amplitude to 0.2 VP-P, repeat steps (2) to (11) above and determine GCRDY1, GCRDY2, GCRDY3, GCRSB1, GCRSB2 and GCRSB3.
2000-07-20
78/113
TA1316AN
Test Conditions Note No. Parameter SW3 S03 YUV gain A/C SW8 B SW mode SW4 A/B SW9 B SW5 A/B SW10 B SW7 OPEN (1) Set picture mute to off (P-MODE: Normal1 (000)), BRIGHTNESS to maximum (11111111), COLOR to center (1000000) and UNI-COLOR to maximum (1111111). (2) Set SW3 to A, and SW4 and SW5 to B; input a 100-kHz sine wave to TPA and set pin 3 amplitude to 0.2 VP-P. (3) Set SW56 to open, YUV INPUT MODE to Y/Cb/Cr (00), Y/Pb/Pr (01), Through (10) and Y/U/V (11). Measure pin 56 amplitudes, VY00, VY01, VY10 and VY11. (4) Set SW3 to C, and SW4 to A and SW5 to B, input 100-kHz sine wave to TP4 and set pin 4 amplitude to 0.2 VP-P. (5) Set YUV INPUT MODE to Y/Cb/Cr (00), Y/Pb/Pr (01), Through (10) and Y/U/V (11). Measure pin 41 amplitudes VB00, VB01, VB10 and VB11. (6) Set SW3 to C, and SW4 and SW5 to A; input a 100-kHz sine wave to TP5 and set pin 5 amplitude to 0.2 VP-P. (7) Set YUV INPUT MODE to Y/Cb/Cr (00), Y/Pb/Pr (01), Through (10) and Y/U/V (11). Measure pin 43 amplitudes VR00, VR01, VR10 and VR11. (8) Calculate using the following formulae. GY00 = 20 x log (VY00/0.2) GY10 = 20 x log (VY10/0.2) GBA = 20 x log (VB01/VB00) GBC = 20 x log (VB11/VB00) GRA = 20 x log (VR01/VR00) GRC = 20 x log (VR11/VR00) GRB = 20 x log (VR10/VR00) GY01 = 20 x log (VY01/0.2) GY11 = 20 x log (VY11/0.2) GBB = 20 x log (VB10/VB00) Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
79/113
TA1316AN
Test Conditions for Color Difference Signal 2
Test Conditions Note No. Parameter SW3 A01 Color difference signal contrast adjustment characteristic C SW4 A or B SW5 A or B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Set BRIGHTNESS to maximum and sub-address (12) data to F0. (2) Input signal 3 (f0 = 100 kHz, picture period amplitude = 0.23 VP-P) to pin 5. (3) Vary UNI-COLOR to maximum (7F), center (40) and minimum (00) and measure pin 43 picture period amplitudes VuCYMAX, VuCYCNT and VuCYMIN. (4) Determine in decibels amplitude ratio VuCY of UNI-COLOR maximum to minimum. (5) Repeat steps (2) and (4) changing input to pin 4 (picture period amplitude = 0.2 VP-P), and measure pin 41 output. A02 Color adjustment characteristic C A or B A or B A A A A A A (1) Set BRIGHTNESS to maximum and sub-address (12) data to F0. (2) Input signal 3 (f0 = 100 kHz, picture period amplitude = 0.115 VP-P) to pin 5. (3) Vary COLOR to maximum (7F), center (40) and minimum (01), and measure pin 43 picture period amplitudes VCCYMAX, VCCYCNT and VCCYMIN. (4) Determine in decibels amplitude ratio VCCY of maximum and minimum to COLOR center. (5) Repeat steps (2) and (4), changing input to pin 4 (picture period amplitude = 0.1 VP-P), and measure pin 41 output. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
80/113
TA1316AN
Test Conditions Note No. Parameter SW3 A03 Color difference signal half-tone characteristic C SW4 A or B SW5 A or B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 3 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 5. (2) Measure pin 43 output picture period amplitude vHTARY. (3) Apply 1.5 V to pin 52 from external power supply. (4) Measure pin 43 output picture period amplitude vHTBRY. (5) Determine GHTRY = vHTBRY/vHTARY. (6) Repeat steps (1) to (5) above, changing pin to pin 42, and determine GHTGY = vHTBGY/vHTAGY. (7) Input signal to pin 4, measure pin 4 and determine GHTBY = vHTBBY/vHTABY. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
81/113
TA1316AN
Test Conditions Note No. Parameter SW3 A04 Color characteristic C SW4 B SW5 A SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 2 to pin 5. (2) Increase signal 2 amplitude A. When sub-address (14) data starts with correction, determine pin 43 output signal amplitudes V1, V2 and V3. Graph the results in the following cases: (01) - off (03) - 1 on (05) - 2 on (07) - 3 on (3) Determine V where starts applying and gradient ratio at on when linearity at off is (1). Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Pin 43 output amplitude
OFF
V
ON
Pin 5 input amplitude
2000-07-20
82/113
TA1316AN
Test Conditions Note No. Parameter SW3 A05 Color limiter characteristic C SW4 B SW5 A SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 2 (picture period amplitude = 0.4 VP-P) to pin 4. (2) When sub-address (14) data is 00 and 01, measure pin 43 output signal picture period amplitudes CLT0 and CLT1. C B A A A A A A A (1) Input signal 2 (picture period amplitude = 0.2 VP-P) to pin 4. (2) Adjust COLOR and set pin 41 output picture period amplitude to 1.2 VP-P. (3) When sub-address (0B) data is 80, measure pin 41 output signal picture period amplitude V41. (4) Calculate using the following formula. HBC1 = (1.2 - v41)/1.2 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
A06
High bright color gain
2000-07-20
83/113
TA1316AN
Test Conditions for Text
Common Test Conditions for Text
(1) (2) Unless otherwise specified, measure bus data using preset values. Set the following data: Sub-address (00) to data (02) Sub-address (05) to data (7F) Sub-address (09) to data (40) Sub-address (0B) to data (7F) Sub-address (0C) to data (82) Sub-address (12) to data (F0) Sub-address (19) to data (F8) Sub-address (1A) to data (E0) Sub-address (1B) to data (E0) Sub-address (1D) to data (78) Sub-address (1E) to data (87)
Test Conditions Note No. Parameter SW3 T01 AC gain A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 1 (f0 = 100 kHz, amplitude of picture period voltage = 0.2 VP-P) to pin 3. (2) Measure pins 41, 42 and 43 picture period amplitudes V41, V42 and V43. (3) Determine AC gain using the following formulae. GR = V43/0.2 T02 Unicolor adjustment characteristic A B B A A A A A A GG = V42/0.2 GB = V41/0.2 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(1) Input signal 1 (f0 = 100 kHz, amplitude of picture period voltage = 0.2 VP-P) to pin 3. (2) Vary UNI-COLOR data to maximum (7F), center (40) and minimum (00), and measure pin 43 picture period amplitudes VuMAX, VuCNT and VuMIN. (3) Determine amplitude ratio Vu of VuMAX to VuCNT (in decibels).
T03
Brightness adjustment characteristic White peak slice level
A
B
B
A
A
A
A
A
A
(1) Input signal 2 to pin 3 and set pin 43 picture period amplitude to 1 VP-P. (2) Vary BRIGHTNESS to maximum (7F), center (80) and minimum (00), and measure pin 43 voltages VbrMAX, VbrCNT and VbrMIN.
T04
C
B
B
A
A
A
A
A
A
(1) Set SUB-CONTRAST to maximum. (2) Apply external power supply to pin 3 and increase voltage from 5.8 V. (3) When pin 43 picture period is clipped, measure pin 43 picture period amplitude voltage VWPS1. (4) Repeat steps from (1) to (3) above (for VWPS2), changing sub-address (0C) data to 06.
2000-07-20
84/113
TA1316AN
Test Conditions Note No. Parameter SW3 T05 Black peak slice level RGB output S/N C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Apply external power supply to pin 3 and gradually decrease voltage from 5.8 V. (2) When picture period is clipped, measure Vbps voltage for pins 41, 42 and 43. C B B A A A A A A (1) Adjust BRIGHTNESS so that pin 41 picture period voltage is 2.4 V. (2) Set COLOR to minimum. (3) Measure pins 41, 42 and 43 picture period noise levels n41, n42 and n43 (VP-P) using oscilloscope. (4) Calculate S/N. N41 = -20 x log [2.3/(0.2 x n41)] N42 = -20 x log [2.3/(0.2 x n42)] N43 = -20 x log [2.3/(0.2 x n43)] T07 Half-tone characteristic A B B A A A A A A (1) Input signal 1 (f0 = 100 kHz, amplitude of picture period voltage = 0.2 VP-P) to pin 3. (2) Measure pin 41 picture period amplitude v41A. (3) Apply 1.5 V to pin 52 from external power supply. (4) Measure pin 41 picture period amplitude v41B. (5) Determine GHT1 = v41B/v41A. (6) Stop applying voltage to pin 52, set sub-address (1A) data to E2 and measure pin 41 picture period amplitude v41C. (7) Determine GHT2 = v41C/v41A. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
T06
2000-07-20
85/113
TA1316AN
Test Conditions Note No. Parameter SW3 T08 Blanking pulse delay time C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Apply signal shown in Figure (A) to pin 24 (BLK IN) and determine tdON and tdOFF from output signal from pins 41, 42 and 43 (Figure (B)). 63.5 s Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(A) Signal applied to pin 24
tdON
tdOFF
(B) Output signal from pins 41, 42 and 43.
2000-07-20
86/113
TA1316AN
Test Conditions Note No. Parameter SW3 T09 Drive adjustment variable range A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3. (2) Change sub-address (0D) data to maximum (FE), center (80) and minimum (00), and measure pin 42 picture period amplitude. (3) Determine in decibels amplitude ratios of maximum and minimum to drive center (DRGG1+, DRG1-). (4) Repeat steps (1) to (3) above, changing sub-address (0E) data to instead, and determine in decibels pin 41 picture period amplitude ratios (DRB1+, DRB2-). (5) Repeat steps (1) to (3) above, changing sub-address (0E) data to center (81), and determine in decibels pin 42 picture period amplitude ratios (DRG2+, DRG2-). (6) Repeat steps (1) to (3) above, changing sub-address (0E) data to maximum (FF), center (81) and minimum (01), and determine in decibels pin 41 amplitude ratios (DRB2+, DRB2-). (7) Repeat steps (1) to (3) above, changing sub-address (0D) data to maximum (FF), center (81) and minimum (01), and determine in decibels pin 43 amplitude ratios (DRR1+, DRR1-). (8) Repeat steps (1) to (3) above, setting sub-address (0D) data to 81 and changing sub-address (0E) data, and determine in decibels pin 41 picture period amplitude ratios (DRB3+, DRB3-). (9) Repeat steps (1) to (3) above, setting sub-address (0E) data to 81 and changing sub-address (0D) data to maximum (FF), center (81) and minimum (01), and determine in decibels pin 42 picture period amplitude ratios (DRG3+, DRG3-). (10) Repeat steps (1) to (3) above, setting sub-address (0D) data to 81 and changing sub-address (0E) data to maximum (FF), center (81) and minimum (01), and determine in decibels pin 43 picture period amplitude ratios (DRR2+, DRR2-). Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
87/113
TA1316AN
Test Conditions Note No. Parameter SW3 T10 Pin 53 input impedance C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Connect external power supply, voltmeter and ammeter as shown below. Adjust voltage so that current value is 0. (2) Increase pin 53 voltage by 0.2 V and measure current value of ammeter Iin. (3) Determine Zin53 = 0.2 V/Iin (). - + Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
53
A
Ammeter (A)
V
Voltmeter
T11
ACL characteristic
C
B
B
A
A
A
A
A
A
(1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3. (2) Measure pin 43 picture period amplitude vACL1. (3) Apply external power supply (pin 53 DC voltage - 0.5 V) to pin 53 and measure pin 43 picture period amplitude vACL2. (4) Apply external power supply (pin 53 DC voltage - 1 V) to pin 53 and measure pin 43 picture period amplitude vACL3. (5) Calculate using the following formulae. ACL1 = -20 x log (vACL2/vACL1) ACL2 = -20 x log (vACL3/vACL1)
2000-07-20
88/113
TA1316AN
Test Conditions Note No. Parameter SW3 T12 ABL point C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Measure pin 53 DC voltage VABL1. (2) Set sub-address (1B) data to 1C. (3) Apply external power supply to pin 53 and decrease voltage from 6.5 V. When pin 43 voltage starts changing, measure pin 53 voltage VABL2. (4) Repeat step (3) above, making the following changes: Set sub-address (1B) data to 3C, 5C, 7C, 9C, BC, DC and FC and measure the following voltages on pin 53: VABL3, VABL4, VABL5, VABL6, VABL7, VABL8 and VABL9. (5) ABLP1 = VABL2 - VABL1 ABLP2 = VABL3 - VABL1 ABLP3 = VABL4 - VABL1 ABLP4 = VABL5 - VABL1 T13 ABL gain C B B A A A A A A ABLP5 = VABL6 - VABL1 ABLP6 = VABL7 - VABL1 ABLP7 = VABL8 - VABL1 ABLP8 = VABL9 - VABL1 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(1) Apply external power supply of 6.5 V to pin 53. (2) Set sub-address (1B) data to 00. (3) Set BRIGHTNESS to maximum. (4) Apply external power supply of 4.5 V to pin 53. (5) Repeat step (3) above, making the following changes: Set sub-address (1B) data to 00, 04, 08, 0C, 10, 14, 18 and 1C and measure the following voltages on pin 53: VABL11, VABL12, VABL13, VABL14, VABL15, VABL16, VABL17 and VABL18. (6) ABLG1 = VABL11 - VABL10 ABLG2 = VABL12 - VABL10 ABLG3 = VABL13 - VABL10 ABLG4 = VABL14 - VABL10 ABLG5 = VABL15 - VABL10 ABLG6 = VABL16 - VABL10 ABLG7 = VABL17 - VABL10 ABLG8 = VABL18 - VABL10
2000-07-20
89/113
TA1316AN
Test Conditions Note No. Parameter SW3 T14 RGB output mode C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Adjust BRIGHTNESS so that pin 43 picture period voltage becomes 2.4 V. (2) Set sub-address (1B) data to 01. (3) Measure picture period voltages V43R, V42R and V41R on pins 43, 42 and 41 respectively. (4) Repeat step (3) above, changing sub-address (1B) data to 02, and measure picture period voltages V43G, V42G and V41G on pins 43, 42 and 41 respectively. (5) Repeat step (3), changing sub-address (1B) data to 03, and measure picture period voltages V43B, V42B and V41B on pins 43, 42 and 41 respectively. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
90/113
TA1316AN
Test Conditions Note No. Parameter SW3 T15 Y-OUT characteristic A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input ramp waveform to pin 3 and adjust input amplitude so that pin 43 picture period amplitude becomes 2.3 VP-P. (2) Set sub-address (1C) data to 01. (3) Adjust input amplitude so that pin 43 picture period amplitude becomes 2.3 VP-P. (4) According to the figure below, determine in decibels Y-OUT correction start points 1 and 2 and gradient ratios 1, 2 and 3, which are ratios of gradient at -on to gradient at -off. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Output amplitude (Y-OUT)
100 IRE 3 2 2
1 1
2.3 Vp-p
Note: Solid line: -off Dotted line: -on
Input amplitude
2000-07-20
91/113
TA1316AN
Test Conditions Note No. Parameter SW3 T16 Blue stretch circuit characteristic A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input ramp signal of 0.7 VP-P to pin 3. (2) Set SUB-CONTRAST to maximum. (3) Set sub-address (1F) data to 04. (4) Set sub-address (1E) data to 00 and determine blue stretch start point BSPmin using pin 41 in the figure below. (5) Repeat step (4) above, changing sub-address (1E) data to 04 and 07. Determine blue stretch start points BSPCNT and BSPmax. (6) Set sub-address (1E) data to 04. (7) Determine in decibels ratio of gradient at blue stretch on to gradient at blue stretch off, using pin 41 as shown in the figure below. (8) Repeat step (7) above, changing sub-address (1F) data to 00 and 07, and determine in decibels gradient ratios BSGmin and BSGmax. Note: The blue stretch start point is determined as an IRE value by setting the amplitude from the output signal pedestal level to the positive side to be 2.3 VP-P = 100 IRE. Blue stretch on Output amplitude (Pin 41 output) Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Blue stretch off
Blue stretch start point
Input amplitude
2000-07-20
92/113
TA1316AN
Test Conditions Note No. Parameter SW3 T17 ACB pulse phase and amplitude A or C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3. Adjust DRIVE GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43. (2) Measure voltage of pins 46, 47 and 48 and apply measured voltages from external power supply to pins. (3) Set sub-address (02) data to 40. (4) Determine ACB pulse phase by referencing signal waveform output from pins 43, 42 and 41 as shown in Figure 1 below. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
Note: The first picture period after V-BLK ends and FBP input falls is 1H. After each H-BLK, the phase is 2H, 3H and so on.
ACB pulse amplitude
V-BLK period
Figure 1
RGB output 1H 2H 3H 4H
Figure 2
FBP input (pin 24)
(5) Determine ACB pulse amplitudes VACB1R, VACB1G and VACB1B by referencing signal waveform output from pins 43, 42 and 41. (Amplitude is based on picture period level at no input.) (6) Repeat step (5) above, setting sub-address (02) data to 80, and measure VACB2R, VACB2G and VACB2B. (7) Repeat step (5) above, setting sub-address (02) data to C0, and measure VACB3R, VACB3G and VACB3B.
2000-07-20
93/113
TA1316AN
Test Conditions Note No. Parameter SW3 T18 IK input amplitude A or C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3. Adjust DRIVE GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43. (2) Set sub-address (02) data to 40. (3) Determine voltage amplitudes while ACB pulse is being applied to pin 45 input signal as shown in Figure 1 of T19 above. At 1H = IKR, at 2H = IKG and at 3H = IKB T19 IK input cover range C B B A A A A A A (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3 and adjust DRIVE GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43. (2) Set sub-address (02) data to 40. (3) Determine DC voltage of pin 45 during V-BLK (#45VBLK). (4) Apply external voltage via 10 k and gradually increase the voltage from 0 V. (5) Determine DC voltage of pin 45 during V-BLK when picture period amplitude of pin 43 has just started decreasing (#45VBLK+). (6) Reset the external voltage to 0 V and gradually decrease from 0 V. (7) Determine DC voltage of pin 45 during V-BLK when picture period amplitude of pin 43 has just started increasing (#45VBLK-). (8) DIKin+ = (#45VBLK+) - (#45VBLK) DIKin- = (#45VBLK-) + (#45VBLK) T20 Analog RGB gain A B B A or B A or B A or B A A A (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3 and adjust DRIVE GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43. (2) Apply 5 V from external power supply to pin 49. (3) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 35. (4) Measure picture period amplitude v43R on pin 43. (5) Repeat steps (3) and (4), making the following changes. Input signal 1 to pin 34 and measure pin 42 output (v42G). Input signal 1 to pin 33 and measure pin 41 output (v41B). (6) Calculate using the following formulae. GTXR = v43R/0.2 GTXG = v42G/0.2 GTXB = v41B/0.2 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
94/113
TA1316AN
Test Conditions Note No. Parameter SW3 T21 Analog RGB white peak slice level A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 A (1) Apply 5 V from external power supply to pin 49. (2) Set RGB CONTRAST to maximum (7F). (3) Apply external power supply to pin 35. Gradually increase voltage from 3.0 V DC. When pin 43 output is clipped, measure picture period amplitude. (4) Repeat step (3), making the following changes: Input to pin 34 and measure pin 42 output; input to pin 33 and measure pin 41 output. T22 Analog RGB black peak limit level A B B A A A A A A (1) Apply 5 V from external power supply to pin 49. (2) Set RGB CONTRAST to maximum (7F). (3) Apply external power supply to pin 35. Gradually increase voltage from 4.5 V DC. When pin 43 output is clipped, measure picture period amplitude. (4) Repeat step (3), making the following changes: Input to pin 34 and measure pin 42 output; input to pin 33 and measure pin 41 output. T23 RGB contrast adjustment characteristic A B B A or B A or B A or B A A A (1) Apply 5 V from external power supply to pin 49. (2) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 35. (3) Change RGB CONTRAST to maximum (7F), center (40) and minimum (00), and measure picture period amplitude output VuTXR (max, CNT and min) on pin 43. (4) Determine in decibels amplitude ratios of maximum and minimum to center. (5) Repeat steps (3) and (4), making the following changes: Input to pin 34 and measure picture period amplitude output on pin 42. Input to pin 33 and measure picture period amplitude output on pin 41. T24 Analog RGB brightness adjustment characteristic A B B A or B A or B A or B A A A (1) Input signal 2 to pins 33, 34 and 35. (2) Apply 5 V from external power supply to pin 49. (3) Adjust signal 2 amplitude (A) so that pin 43 picture period amplitude becomes 0.5 VP-P. (4) Change RGB BRIGHTNESS to maximum (FE), center (80) and minimum (00), and measure picture period voltage output VbrTX (max, CNT and min) on pins 43, 42 and 41 respectively. T25 Analog RGB mode switching transfer characteristic C B B A A A A A A (1) Set RGB BRIGHTNESS to maximum (FE). (2) Input signal 4 (signal amplitude = 1.5 VP-P) to pin 49. (3) Measure input/output transfer characteristic using pin 43 in Figure T-2. (4) Repeat steps (2) and (3) above, making the following changes: Input to pin 34 and measure pin 42; input to pin 33 and measure pin 41. (5) Determine maximum inter-axial rise/fall transfer delay time, using the data measured above. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
95/113
TA1316AN
Test Conditions Note No. Parameter SW3 T26 Text ACL characteristic A SW4 B SW5 B SW33 A SW mode SW34 A SW35 B SW37 A SW38 A SW39 A (1) Apply 5 V from external power supply to pin 49. (2) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 35. (3) Measure pin 43 picture period amplitude vTXACL1. (4) Apply external power supply (pin 53 DC voltage - 0.5 V) to pin 53 and measure picture period amplitude output vTXACL2 on pin 43. (5) Apply external power supply (pin 53 DC voltage - 1.0 V) to pin 53 and measure picture period amplitude output vTXACL3 on pin 43. (6) TXACL1 = -20 x log (vTXACL2/vTXACL1) TXACL2 = -20 x log (vTXACL3/vTXACL1) (7) Repeat steps (5) and (6), setting sub-address (10) data to 01 to ascertain TXACL3 and TXACL4. T27 Analog OSD gain A B B A A A A or B A or B A or B (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3 and adjust DRIVE GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43. (2) Apply 5 V from external power supply to pins 50 and 51. (3) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 39. (4) Adjust output picture period amplitude v43R on pin 43. (5) Repeat steps (3) and (4), making the following changes: Input to pin 38 and measure picture period amplitude output on pin 42 (v42G). Input to pin 37 and measure picture period amplitude output on pin 41 (v41B). (6) Calculate using the following formulae. GOSDG = v42G/0.2 GOSDR = v43R/0.2 T28 Analog OSD white peak slice level A B B A A A A A A GOSDB = v41B/0.2 Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
(1) Apply 5 V from external power supply to pins 50 and 51. (2) Apply external power supply to pin 39 and gradually increase voltage from 4.5 V DC. When pin 43 output is clipped, measure picture period amplitude. (3) Repeat step (2), making the following changes: Input to pin 38 and measure picture period amplitude output on pin 42. Input to pin 37 and measure picture period amplitude output on pin 41.
T29
Analog OSD black peak limit level
A
B
B
A
A
A
A
A
A
(1) Apply 5 V from external power supply to pins 50 and 51. (2) Apply external power supply to pin 39 and gradually decrease voltage from 4.5 V DC. When pin 43 output is clipped, measure picture period amplitude. (3) Repeat step (2), making the following changes. Input to pin 38 and measure picture period amplitude output on pin 42. Input to pin 37 and measure picture period amplitude output on pin 41.
2000-07-20
96/113
TA1316AN
Test Conditions Note No. Parameter SW3 T30 Analog OSD contrast adjustment characteristic A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A or B SW38 A or B SW39 A or B (1) Apply 5 V from external power supply to pins 50 and 51. (2) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 39. (3) Change OSD-CONTRAST to (11), (10), (01) and (00) and measure picture period amplitude outputs VuOSDR (11), (10), (01) and (00) on pin 43. (4) Repeat steps (2) and (3), making the following changes: Input to pin 38 and measure picture period amplitude outputs VuOSDG (11), (10), (01) and (00) on pin 42. Input to pin 37 and measure picture period amplitude outputs VuOSDB (11), (10), (01) and (00) on pin 41. T31 Analog OSD brightness adjustment characteristic C B B A A A A A A (1) Apply 5 V from external power supply to pins 50 and 51. (2) Change OSD BRIGHT (sub-address 1D) to (38), (78), (B8) and (F8) and measure picture period voltage outputs on pins 43, 42 and 41. Data (38) - VbrOSD0 Data (78) - VbrOSD1 Data (B8) - VbrOSD2 Data (F8) - VbrOSD3 T32 Analog OSD mode switching transfer characteristic C B B A A A A A A (1) Set OSD BRIGHT to maximum (11). (2) Input signal 4 (signal amplitude = 4.5 VP-P) to pin 50. (3) Measure input/output transfer characteristic, using pin 43 as shown in Figure T-2. (4) Repeat steps (2) and (3) above, and measure pins 42 and 41. (5) Determine maximum inter-axial rise/fall transfer delay time, using the data measured above. (6) Repeat steps (1) to (5), inputting signal 4 (signal amplitude = 4.5 VP-P) to pin 51, and measure. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
97/113
TA1316AN
Test Conditions Note No. Parameter SW3 T33 OSD ACL characteristic A SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A SW38 A SW39 B (1) Set sub-address (07) data to 01. (2) Apply 5 V from external power supply to pins 50 and 51. (3) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 39. (4) Measure picture period amplitude vOSDACL1 on pin 43. (5) Apply external power supply (pin 53 DC voltage - 0.5 V) to pin 53 and measure picture period amplitude vOSDACL2 on pin 43. (6) Apply external power supply (pin 53 DC voltage - 1 V) to pin 53 and measure picture period amplitude vOSDACL3 on pin 43. (7) OSDACL1 = -20 x log (vOSDACL2/vOSDACL1) OSDACL2 = -20 x log (vOSDACL3/vOSDACL1) (8) Repeat steps (5) and (6) above, changing sub-address (07) data to 00, and measure OSDACL3 and OSDACL4. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
98/113
TA1316AN
Test Conditions Note No. Parameter SW3 T34 OSD blending characteristic A C SW4 B SW5 B SW33 A SW mode SW34 A SW35 A SW37 A B SW38 A B SW39 B B (1) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pin 3. (2) Measure picture period amplitudes v41a, v42a and v43a on pins 41, 42 and 43 respectively. (3) Apply 5 V from external power supply to pin 51. (4) Measure picture period amplitudes v41b, v42b and v43b on pins 41, 42 and 43 respectively. (5) Determine in decibels v41b amplitude in relation to v41a; v42b amplitude in relation to v42a; v43b amplitude in relation to v43a: 41TV1, 42TV1 and 43TV1. (6) Repeat steps (3) to (5), applying 5 V from external power supply to pin 50, and measure 41TV2, 42TV2 and 43TV2. (7) Repeat steps (3) to (5), applying 5 V from external power supply to pins 50 and 51, and measure 41TV3, 42TV3 and 43TV3. (8) Set to SW3 to C; SW37, SW38, Sw39 to B. (9) Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 VP-P) to pins 37, 38 and 39. (10) Apply 5 V from external power supply to pins 50 and 51. (11) Measure picture period amplitudes v41c, v42c and v43c on pins 41, 42 and 43 respectively. (12) Apply 5 V from external power supply to pin 50. (13) Measure picture period amplitudes v41d, v42d and v43d on pins 41, 42 and 43 respectively. (14) Determine in decibels v41d amplitude in relation to v41c; v42d amplitude in relation to v42c; v43d amplitude in relation to v43c: 41OSD1, 42OSD1 and 43OSD1. (15) Repeat steps (12) to (14), applying 5 V from external power supply to pin 51, and measure 41OSD2, 42OSD2 and 43OSD2. (16) Repeat steps (12) to (14), applying 5 V from external power supply to pins 50 and 51, and measure 41OSD3, 42OSD3 and 43OSD3. Test Method (test conditions: VCC = 9 V/2 V, Ta = 25 3C)
2000-07-20
99/113
TA1316AN
Test Conditions for Deflection
Common Test Conditions for Sync Signal
(Unless otherwise specified, VCC = 9 V/2 V, Ta = 25C, BUS data = preset values.) (Unless otherwise specified, SW3 = A, SW14 = A, SW20 = on, SW22 = open, SW23 = B, SW24a = B, SW24b = open and SW26 = B.)
Note No. Parameter Test Method (1) Input signal a (as shown in figure below) to TPA. Set sub-address (00) data to 82H. (2) Determine phase difference S1PH from pin 14 (SYNC IN) input waveform and pin 20 (AFC filter) waveform.
HA01 Sync input horizontal sync phase
29.36 s
Signal a
0.285 V 0.593 s SPH
Pin 20 waveform
HA02 HD 1/2 input (1) Set sub-address (00) data to 40H. horizontal sync phase (2) Input signal b (as shown in figure below) to TP16. (3) Determine phase difference HD1PH from pin 16 (HD1 IN) input waveform and pin 20 (AFC filter) waveform. (4) Input signal b to TP13 and set sub-address (00) data to 41H. (5) Determine phase difference HD2PH as in step (3) above. 31.75 s
Signal b
1.5 V 2.35 s HD1PH, HD2PH
Pin 20 waveform
2000-07-20
100/113
TA1316AN
Note No. Parameter (1) Set sub-address (00) data to 40H. (2) Input signal b (as shown in figure below) to TP16. (3) Decrease signal b duty from 10% (to shorter negative polarity period) and determine signal b duty (HDDUTY1) when pin 16 input signal phase no longer locks with that of pin 26 (H-OUT). (4) Increase signal b duty from 10% (to longer negative polarity period) and determine signal b duty (HDDUTY2) when pin 24 (FBP IN) phase changes in relation to signal b. (5) Further increase signal b duty (to longer negative polarity period) and determine signal b duty (HDDUTY3) when pin 16 input signal phase no longer locks with that of pin 26 (H-OUT). (6) Decrease signal b duty from 90% (to shorter negative polarity period) and determine signal b duty (HDDUTY4) when pin 24 (FBP IN) phase changes in relation to signal b. Test Method
HA03 Polarity detection range
31.75 s
Signal b A B Duty = A/B x 100% (0%~100%) HA04 Sync input threshold amplitude (1)
1.5 V
Set sub-address (00) to 82H and TEST mode to 01.
(2) Apply external voltage via 20 k to pin 14. (3) Set external voltage to 0 V and monitor pin 14 pin voltage SYNC_TIP_00. Also check that pin 28 pin voltage is L. (4) By increasing external voltage SYNC_OFF_00, monitor pin 14 SYNC IN pin voltage when pin 28 DAC1 pin voltage becomes H. (5) Determine SYNC input level at SYNC separation level 00 as follows: Vths00 = (SYNC_OFF_00 - SYNC_TIP_00) /0.286 x 100 (6) Set SYNC separation level from 01 to 10 to 11, and determine Vths01, Vths10 and Vths11. Vths01 = (SYNC_OFF_01 - SYNC_TIP_01) /0.286 x 100 Vths10 = (SYNC_OFF_10 - SYNC_TIP_10) /0.286 x 100 Vths11 = (SYNC_OFF_11 - SYNC_TIP_11) /0.286 x 100
1H
0.08H
Pin 14 40 IRE (= 286 mVp-p) Pin 28 (SYNC output Mode) Sync Sepa level Sync Tip level
2000-07-20
101/113
TA1316AN
Note No. Parameter (1) Set sub-address (00) data to 40H. (2) Input signal b (as shown in figure below) to TP16. (3) Increase signal b amplitude from 0 VP-P. When pin 26 (H-OUT) phase locks with that of signal b, determine signal b amplitude VthHD1. (4) Input signal b (as shown in figure below) to TP13 and set sub-address (00) data to 41H. (5) Measure as in step (3) above, and determine signal amplitude VthHD2. Test Method
HA05 HD 1/2 input threshold voltage
31.75 s
Signal b
VthDH 2.35 s
HA06 Horizontal picture phase adjustment variable range
(1) Set sub-address (00) data to 40H. (2) Input signal b (as shown in figure below) to TP16. (3) Change sub-address (01) data from 80H to 00H and measure pin 26 (H-OUT) waveform phase change HSFT-. (4) Change sub-address (01) data from 80H to FEH and measure pin 26 (H-OUT) waveform phase change HSFT+. 31.75 s
Signal b
1.5 V 2.35 s
Pin 26 waveform Data: 00H HSFT- Pin 26 waveform Data: 80H HSFT+ Pin 26 waveform Data: FEH
2000-07-20
102/113
TA1316AN
Note No. Parameter (1) Set sub-address (00) data to 40H. (2) Input signal b (as shown in figure below) to TP16. (3) Connect external power supply to pin 23 (H CURVE CORRECTION). Apply 1.5 V and 3.5 V to pin 23 and measure the output waveform phase change H#23 on pin 26 (H-OUT). 31.75 s Test Method
HA07 Curve correction
Signal b
1.5 V 2.35 s
Pin 26 waveform (pin 23 voltage: 1.5 V) H#23 Pin 26 waveform (pin 23 voltage: 3.5 V)
HA08 Clamp pulse phase, width and level
(1) Set sub-address (00) data to 40H. (2) Input signal b (as shown in figure below) to TP16. (3) Determine clamp pulse phase CPS0, width CPPW0 and output level CPV0 on pin 18 (SCP OUT) in relation to signal b. (4) Set sub-address (01) data to 81H. Determine CPS1, CPPW1 and CPV1 as in step (3) above. (5) Apply no signal input to TP16. (6) Determine pin 18 clamp pulse phase CPS2, width CPPW2 and output level CPV2 in relation to pin 24.
31.75 s
Signal b 2.35 s CPS0/1 Pin 18 waveform
1.5 V
CPV0/1 CPW0/1
Pin 24 waveform
CPS2
Pin 18 waveform
CPV2 CPW2
2000-07-20
103/113
TA1316AN
Note No. Parameter Test Method
HA09 Black peak detection (1) Set sub-address (00) data to 40H. pulse phase and level (2) Set SW24A to open. (3) Input signal c (as shown in figure below) to pin 24 (FBP IN). (4) Determine pin 18 (SCP OUT) black peak detection pulse phase HBPS0a and HBPS0b in relation to signal c. (5) Determine output level HBPSV0 from pin 18 (SCP OUT) output waveform. (6) Set sub-address (02) data to 90H. (7) Measure as in steps (4) and (5), and determine phases HBPS1a and HBPS1b, and output level HBPSV1. (8) Change sub-address (00) data to C0H and sub-address (02) data to 80H, and determine phases HBPS45a and HBPS45b, and output level HBPSV45. 31.5 s 4.13 s 2V Signal c 0V HBPS0a/S1a/S45a HBPS0b/S1b/S45b
Pin 18 waveform HBPSV0/SV1/SV45
HA10 FBP threshold
(1) Set sub-address (00) data to 40H. (2) Input signal b (as shown in figure below) to TP16. (3) Increase amplitude of FBP signal input to pin 24 (FBP IN) from 0 VP-P. When signal b and pin 26 (H-OUT) phases are locked, measure pin 24 input amplitude (VthFBP).
31.75 s
1.5 V 2.35 s
2000-07-20
104/113
TA1316AN
Note No. Parameter (1) No signal input. (2) Measure T1 and T2 (as shown in figure below) from pin 26 (H-OUT) output waveform when sub-address (00) data is 80H and A0H. Determine duties TH00A and TH00B using the following formula: TH = T1/(T1 + T2) x 100 % (3) Set sub-address (00) data to 81H, A1H, 82H and A2H, measure as in step (2) above, and determine duties TH01A, TH01B, TH10A and TH10B. Test Method
HB01 H-OUT pulse duty
T1
T2
Pin 26 waveform
HB02 Horizontal free-running frequency
(1) Set SW20 to open. (2) Set sub-address (00) data to 00H and measure horizontal free-running frequency F00 from pin 26 (H-OUT) output waveform. (3) Set sub-address (00) data to 40H, 80H and C0H, measure as in step (2) above, horizontal free-running frequencies F01, F10 and F11.
HB03 Horizontal oscillation frequency variable range
(1) Set sub-address (00) data to 00H. (2) Connect 10-k resistor between pin 20 and VCC. Measure horizontal frequency F00MIN from pin 26 (H-OUT) output waveform. (3) Connect 68-k resistor between pin 20 and GND. Measure horizontal frequency F00MAX from pin 26 (H-OUT) output waveform. (4) Set sub-address (00) data to 40H, 80H and C0H, and measure as in steps (2) and (3) above, horizontal frequencies F01MIN, F01MAX, F10MIN, F10MAX, F11MIN and F11MAX.
HB04 Horizontal oscillation control sensitivity
(1) Set SW20 to open. (2) Connect external power supply to TP20. Set sub-address (00) data to 00H. Apply V20 + 0.05 V and V20 - 0.05 V (see HB01) to TP20, and measure frequencies FA and FB from pin 26 (H-OUT) output waveform. Calculate frequency change rate (BH00) using the following formula. (3) Set sub-address (00) data to 40H, 80H and C0H, measure as in step (2) above, and calculate frequency change rates BH01, BH10 and BH11.
HB05 H-OUT output voltage (1) Set SW20 to open. (2) Measure high (V15H) and low (V15L) voltages of pin 26 (H-OUT) output waveform.
2000-07-20
105/113
TA1316AN
Note No. V01 Parameter Test Method
VP output pulse width (1) Input signal d (as shown in figure below) to TP16 and signal e (as shown in figure below) to pin 24 (FBP IN). Vertical free-running (maximum pull-in (2) Measure VP output pulse width (VPW ) from TP27 output waveform. range) (3) Measure VP pull-in range (VPt0) from TP27 output waveform. (4) Set sub-address (03) data to 01H, 02H, 03H, 04H, 05H and 06H and measure, as in step (4) above, pull-in ranges VPt1, VPt2, VPt3, VPt4, VPt5 and VPt6. 2.35 s 29.63 s Signal d (TP16 input signal) 5.6 s Signal e (pin 24 input waveform) 9V 4V
GND
Pin 24 input waveform TP27 waveform VPw VPt
V02
Minimum vertical pull-in range
(1) This is same as step (1) for V01. (2) Input signal f (as shown in figure below) to TP15. (3) Increase signal f cycle from 30H. Measure cycle (TVPULL) when phase locks with that of TP27.
Signal f (TP15 input waveform) 3H TVPULL Pin 24 input waveform TP27 waveform
2000-07-20
106/113
TA1316AN
Note No. V03 Parameter Vertical black peak detection pulse (1) This is same as step (1) for V01. (2) Input signal f (as shown in figure below) to TP15. (3) Measure phase differences VBPP0E and VBPP0S from TP18 output waveform. (4) Set sub-address (03) data to 01H, 02H, 03H, 04H, 05H and 06H, and measure as in step (3) above, phase differences VBPP1E, VBPP1S, VBPP2E, VBPP2S, VBPP3E, VBPP3S, VBPP4E, VBPP4S, VBPP5E, VBPP5S, VBPP6E and VBPP6S. Signal f (TP15 input waveform) 3H 262.5H~1125H Pin 24 input waveform VBPPS VBPPE TP18 waveform Test Method
V04
Vertical blanking stop (1) This is same as step (1) for V01. phase (2) Input signal f (as shown in figure below) to TP15. (3) Set sub-address (03) data to 00H and F0H, and measure blanking stop phases VBLKMIN and VBLKMAX from pin 43 output waveform.
Signal f (TP15 input waveform) 3H 1125H Pin 24 input waveform VBLK
Pin 43 waveform
2000-07-20
107/113
TA1316AN
(1)
Video signal
63.5 s
Frequency f0 sine wave
(2)
Input signal 1
(3)
Input signal 2
Amplitude A
Frequency f0 sine wave
(4)
Input signal 3
Figure T-1
Test Signals for Text/Color Difference Signal 2
2000-07-20
108/113
TA1316AN
63.5 s
20 s
20 s
20 s
20 ns
20 ns
(1) Input signal 4
50%
(2)
0% 10%
tPR
tPF
50%
90% 100% tPR R F tPF
(3)
0% 10%
50%
90% 100% R F
Figure T-2
Test Pulses for Text/Color Difference Signal 2
2000-07-20
109/113
1 F 470 A LED 2 k B 100 k C 1 F 20 k TP1 #56 30 pF #1 SW56 10F 100 F SW54 0.01 F #54 3 k #53 A 56 1 3.9 k #55 #2 2 55 A 0.1 F B #3 20 k C 54 3 TPB 0.1 F TP4 #4 A 53 4 SW4 0.1 F #5 5 Cr1/Pr1 IN Y/C GND Cb1/Pb1 IN TP5 BA TPC SW5 B 0.1 F 6 10 F 3.9 k #7 A 7 MATRIX SW 56 k 33 k SW7 #8 8 Y2 IN BA SW INPUT B 0.1 F #9 A 9 SW9 0.1 F #10 10 BA TP10 16 1 SW10 B 0.1 F #11 15 2 2.2 F TP12 100 100 30 k 1 F NP TP15 100 TP16 100 TP17 100 TP18 100 0.01 F 15 1200 pF 0.01 F 14 3 50 k 7.5 k 13 4 10 F #20 1 k 1 F 3 k SW20 470 51 k 5 10 F 51 k 6 12 15 k 15 k 15 k TP23a 11 100 A SW23 A B 10 7 B SW24A 10 k C 8 9 10 k A #26 B SW26 C 16 1 3.9 k #27 5.1 k TP27 15 2 1 k 5.1 k 50 k 14 3 1200 pF 1000 pF 1 F SW24b 25 32 DEF/DAC GND I L GND
2
Test Circuit
SW2
TPA 75 5.1 k BPH FILTER Y/C VCC VSM OUT 2 k SW3 Y1 IN 10 F 1 F SW1 DARK AREA DET FILTER APL FILTER B ABCL IN 52 #52 YM/P-MUTE/BLK YS 1 (analog OSD) YS 2 (analog OSD) YS 3 (analog RGB) R S/H 0.01 F #51 51 #50 50 0.1 F SW8 TP9 #49 49 A #48 B 48 Cb2/Pb2 IN Cr2/Pr2 IN 11 COLOR LIMITER #12 12 0.1 F #47 47 G S/H 0.1 F #46 46 B S/H 0.1 F #45 45 VD2 IN #13 IK IN 13 HD2 IN #14 RGB GND 6.8 V 300 pF 10 k 1200 pF 14 3 50 k 7.5 k 13 4 44 100 k 75 5.1 k 2 k TPD 5.1 k 50 k 1000 pF 51 k 12 5 A 10 F 51 k 11 6 10 7 8 9 TC4538BP TP13 TP14a TP14b B SW14 14 #15 #16 #17 15 16 SYNC IN VD1 IN HD1 IN 17 10 k 10 k #43 43 R OUT 42 G OUT 100 #42 100 #41 41 B OUT 100 #40 SCP IN #18 RGB VCC 18 SCP OUT ANALOG OSD R IN 100 F 40 0.01 F #39 39 0.1 F #38 19 38 DEF/DAC VCC 20 AFC FILTER #21 ANALOG OSD G IN 0.1 F #37 37 ANALOG OSD B IN 0.1 F #36 21 36 HVCO 503kCR #22 DAC2 (ACB pluse) 10 k A #35 A TA1316AN 10 k 10 k
10 k
10 k
15.75 kHz 16 1 2 TC4538BP 5.1 k 50 k 1000 pF 31.5/33.75 kHz 51 k 5 10 F 51 k 6 7 13 TC4538BP 4 12 11 10
SW39 BA BA B
TP39 SW38 TP38 SW37 TP37 9V
TP20 TP21
TP35
22 #23 23
35 ANALOG R IN
HORIZONTAL FREQUENCY SW TP23b H CURVE CORRECTION #24 #28 30 k 50 k 7.5 k 24 26 27 28 FBP IN
SW35 0.1 F #34 34 ANALOG G IN 33 ANALOG B IN 0.1 F #33 #31 0.1 F BA BA B
SW34
TP34 SW33 TP33
TP31
31
H-OUT
SDA
470 #30 30 VP OUT
2
TP30
SCL
470 #29 29 I L VDD DAC1 (SYNC OUT)
2.0 V 100 F 0.1 F 1/2W 240 VCC (9 V)
2000-07-20 110/113
8
9
TA1316AN
45 kHz
VCC (9 V)
Cb/Pb1-IN 75 Y1-IN 10 F 10 F 100 F Y/C VCC 54 VSM OUT 47 H 0.01 F 55 56 1 75 10 F 1 F 2 1 F 3
M 0.1 F
Application Circuit
1 k 5.1 k 1 k Y1 IN 10 F 53 4
M 0.1 F
DARK AREA DET FILTER APL FILTER BPH FILTER
75
1 k 52 5
M 0.1 F
75 9 10 F
M 0.1 F
1 k
Cr/Pr1-IN 3.9 k Cb1/Pb1 IN Cr1/Pr1 IN Y/C GND ABCL IN YM/P-MUTE/BLK YS 1 (analog OSD) YS 2 (analog OSD) YS 3 (analog RGB) R S/H 0.01 F 51 6 Y2-IN 10 F Cb/ Pb2-IN 10 F 75 7 5.1 k 1 k 8
M 0.1 F
VSM-OUT 100 k
ABCL YM Ys1
75 3.9 k Y2 IN Matrix SW MATRIX SW
Ys2
50
Ys3
Cr/Pr2-IN 1 k Cb2/Pb2 IN Cr2/Pr2 IN 11 2.2 F VD2-IN 12 10
M 0.1 F
49 48 47 G S/H 46 B S/H 0.01 F 0.01 F
COLOR LIMITER
0.01 F 45 VD2 IN IK IN 13 HD2 IN RGB GND 300 pF 30 k 44 6.8 V 14 43 SYNC IN 1 F R OUT 100 100 15 42 R-OUT IK IN
SYNC-IN 10 F 3.9 k HD2-IN VD1-IN HD1-IN SCP-IN SCP-OUT 100 F 0.01 F 1 F 470 H-FREQ SW CURVE CORR FBP-IN 1 k H-OUT VP-OUT 30 k DAC1-OUT
75 5.1 k 1 k
TA1316AN
VD1 IN
G OUT
G-OUT 100 16 17 18 19 41 B OUT HD1 IN 40 100 F SCP IN RGB VCC SCP OUT ANALOG OSD R IN 47 H 0.01 F 39 38 ANALOG OSD G IN 3 k
M 0.01 F
B-OUT
0.1 F DEF/DAC VCC 20 SCB503F30 22 23 24 10 k 25 26 27 28 35 HORIZONTAL FREQUENCY SW H CURVE CORRECTION FBP IN ANALOG R IN 21 AFC FILTER 0.1 F 37 ANALOG OSD B IN 36 DAC2 (ACB pluse) HVCO 30 k 0.1 F 34 ANALOG G IN 33 ANALOG B IN
2
OSD R-IN
OSD G-IN
0.1 F
OSD B-IN
DAC2-OUT
ANALOG R-IN
0.1 F 0.1 F 32 DEF/DAC GND I L GND
ANALOG G-IN
ANALOG B-IN
31 SDA H-OUT
SDA
470 30 VP OUT
2
SCL
SCL
470 29 I L VDD DAC1 (SYNC OUT)
M : Mylar capacitor
0.01 F
2.0 V
47 H VCC VCC
2000-07-20 111/113
TA1316AN
TA1316AN
ABC Application Circuit
+B
CRT
CRT
CRT
R
G
B
IK IN 51~330 pF 6.8 V Z CLAMP 1 Vp-p R G B 20~51 k 45 0~3.0 V (DC)
2000-07-20
112/113
TA1316AN
Package Dimensions
Weight: 5.55 g (typ.)
2000-07-20
113/113

▲Up To Search▲

Price & Availability of TA1316AN

	To Download TA1316AN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .